Patents by Inventor Youngmin EEH

Youngmin EEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10586917
    Abstract: Provided is a method for fabricating an electronic device including a variable resistance element which includes a free layer formed over a substrate and having a changeable magnetization direction, a pinned layer having a pinned magnetization direction, a tunnel barrier layer interposed between the free layer and the pinned layer, and a magnetic correction layer suitable for reducing the influence of a stray field generated by the pinned layer. The method may include: cooling the substrate; and forming the magnetic correction layer over the cooled substrate.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: March 10, 2020
    Assignees: SK hynix Inc., TOSHIBA MEMORY CORPORATION
    Inventors: Jong-Koo Lim, Won-Joon Choi, Guk-Cheon Kim, Yang-Kon Kim, Ku-Youl Jung, Toshihiko Nagase, Youngmin Eeh, Daisuke Watanabe, Kazuya Sawada, Makoto Nagamine
  • Patent number: 10573802
    Abstract: According to one embodiment, a magnetic memory device includes a stacked structure that includes a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer, wherein the entire first magnetic layer exhibits a parallel or antiparallel magnetization direction to the second magnetic layer, and has an anisotropic magnetic field Hk_film within a range from ?1 kOe to +1 kOe.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: February 25, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Tatsuya Kishi, Youngmin Eeh, Kazuya Sawada, Masaru Toko
  • Patent number: 10510950
    Abstract: A magnetoresistive memory device includes a first magnetic layer having a variable magnetization direction, a second magnetic layer, a magnetization direction of the second magnetic layer being invariable, a first nonmagnetic layer provided between the first magnetic layer and the second magnetic layer, and a second nonmagnetic layer provided on the first magnetic layer, which is opposite the first nonmagnetic layer. The first magnetic layer has a stacked layer structure in which an amorphous magnetic material layer is sandwiched between crystalline magnetic material layers. The magnetoresistive memory device further includes nonmagnetic material layers provided between one of the crystalline magnetic material layers and the amorphous magnetic material layer, and between the other crystalline magnetic layer and the amorphous magnetic material layer, respectively.
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: December 17, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Daisuke Watanabe, Toshihiko Nagase, Youngmin Eeh, Kazuya Sawada, Makoto Nagamine, Tadaaki Oikawa, Kenichi Yoshino, Hiroyuki Ohtori
  • Patent number: 10490732
    Abstract: According to one embodiment, a magnetic memory device includes a stacked structure including a first magnetic layer, a second magnetic layer and a nonmagnetic layer between the first magnetic layer and the second magnetic layer, and a sidewall insulating layer provided on a side surface of the stacked structure and containing boron (B).
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: November 26, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Yasuyuki Sonoda, Daisuke Watanabe, Masatoshi Yoshikawa, Youngmin Eeh, Shuichi Tsubata, Toshihiko Nagase, Yutaka Hashimoto, Kazuya Sawada, Kazuhiro Tomioka, Kenichi Yoshino, Tadaaki Oikawa
  • Publication number: 20190334081
    Abstract: A magnetoresistive memory device includes a first magnetic layer having a variable magnetization direction, a second magnetic layer, a magnetization direction of the second magnetic layer being invariable, a first nonmagnetic layer provided between the first magnetic layer and the second magnetic layer, and a second nonmagnetic layer provided on the first magnetic layer, which is opposite the first nonmagnetic layer. The first magnetic layer has a stacked layer structure in which an amorphous magnetic material layer is sandwiched between crystalline magnetic material layers. The magnetoresistive memory device further includes nonmagnetic material layers provided between one of the crystalline magnetic material layers and the amorphous magnetic material layer, and between the other crystalline magnetic layer and the amorphous magnetic material layer, respectively.
    Type: Application
    Filed: July 5, 2019
    Publication date: October 31, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Daisuke WATANABE, Toshihiko NAGASE, Youngmin EEH, Kazuya SAWADA, Makoto NAGAMINE, Tadaaki OIKAWA, Kenichi YOSHINO, Hiroyuki OHTORI
  • Publication number: 20190288184
    Abstract: According to one embodiment, a magnetic memory device includes a stacked structure that includes a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer, wherein the entire first magnetic layer exhibits a parallel or antiparallel magnetization direction to the second magnetic layer, and has an anisotropic magnetic field Hk_film within a range from ?1 kOe to +1 kOe.
    Type: Application
    Filed: September 12, 2018
    Publication date: September 19, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Tatsuya KISHI, Youngmin EEH, Kazuya SAWADA, Masaru TOKO
  • Patent number: 10263178
    Abstract: According to one embodiment, a magnetic memory device includes a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a nonmagnetic layer between the first and second magnetic layers. The second magnetic layer includes a first main surface on the nonmagnetic layer side and a second main surface opposite to the first main surface, and includes a first region on the first main surface side and a second region on the second main surface side, and an intermediate region between the first and second regions and containing a predetermined nonmagnetic element. A concentration of the predetermined nonmagnetic element in the intermediate region is higher than that in the first and second regions. The second magnetic layer contains a magnetic element from the first to second main surfaces.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: April 16, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Kazuya Sawada, Toshihiko Nagase, Youngmin Eeh, Daisuke Watanabe, Kenichi Yoshino, Tadaaki Oikawa, Hiroyuki Ohtori
  • Publication number: 20190109280
    Abstract: Provided is a method for fabricating an electronic device including a variable resistance element which includes a free layer formed over a substrate and having a changeable magnetization direction, a pinned layer having a pinned magnetization direction, a tunnel barrier layer interposed between the free layer and the pinned layer, and a magnetic correction layer suitable for reducing the influence of a stray field generated by the pinned layer. The method may include: cooling the substrate; and forming the magnetic correction layer over the cooled substrate.
    Type: Application
    Filed: November 28, 2018
    Publication date: April 11, 2019
    Inventors: Jong-Koo LIM, Won-Joon CHOI, Guk-Cheon KIM, Yang-Kon KIM, Ku-Youl JUNG, Toshihiko NAGASE, Youngmin EEH, Daisuke WATANABE, Kazuya SAWADA, Makoto NAGAMINE
  • Patent number: 10203380
    Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a pinned magnetization direction; and a tunnel barrier layer between the free layer and the pinned layer, wherein the free layer may include a first magnetic layer; a second magnetic layer having a smaller perpendicular magnetic anisotropy energy density than the first magnetic layer; and a spacer interposed between the first magnetic layer and the second magnetic layer.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: February 12, 2019
    Assignees: SK Hynix Inc., Toshiba Memory Corporation
    Inventors: Ku-Youl Jung, Guk-Cheon Kim, Toshihiko Nagase, Daisuke Watanabe, Won-Joon Choi, Youngmin Eeh, Kazuya Sawada
  • Publication number: 20190019841
    Abstract: A semiconductor device includes a first rare earth oxide layer, a first magnetic layer adjacent to the first rare earth oxide layer, a second rare earth oxide layer, a second magnetic layer adjacent to the second rare earth oxide layer, and a nonmagnetic layer. The first magnetic layer is disposed between the first rare earth oxide layer and the nonmagnetic layer and is oriented in a crystal surface which is the same as a crystal surface of the nonmagnetic layer. The second magnetic layer is disposed between the second rare earth oxide layer and the nonmagnetic layer and is oriented in a crystal surface which is the same as a crystal surface of the nonmagnetic layer. The nonmagnetic layer is disposed between the first magnetic layer and the second magnetic layer.
    Type: Application
    Filed: September 9, 2018
    Publication date: January 17, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Youngmin EEH, Toshihiko NAGASE, Daisuke WATANABE, Kazuya SAWADA, Kenichi YOSHINO, Tadaaki OIKAWA, Hiroyuki OHTORI
  • Patent number: 10170691
    Abstract: Provided is a method for fabricating an electronic device including a variable resistance element which includes a free layer formed over a substrate and having a changeable magnetization direction, a pinned layer having a pinned magnetization direction, a tunnel barrier layer interposed between the free layer and the pinned layer, and a magnetic correction layer suitable for reducing the influence of a stray field generated by the pinned layer. The method may include: cooling the substrate; and forming the magnetic correction layer over the cooled substrate.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: January 1, 2019
    Assignees: SK Hynix Inc., TOSHIBA MEMORY CORPORATION
    Inventors: Jong-Koo Lim, Won-Joon Choi, Guk-Cheon Kim, Yang-Kon Kim, Ku-Youl Jung, Toshihiko Nagase, Youngmin Eeh, Daisuke Watanabe, Kazuya Sawada, Makoto Nagamine
  • Patent number: 10170519
    Abstract: According to one embodiment, a magnetoresistive element includes a first metal layer having a body-centered cubic structure, a second metal layer having a hexagonal close-packed structure on the first metal layer, a metal nitride layer on the second metal layer, a first magnetic layer on the metal nitride layer, an insulating layer on the first magnetic layer, and a second magnetic layer on the insulating layer.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: January 1, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Youngmin Eeh, Toshihiko Nagase, Daisuke Watanabe, Koji Ueda, Makoto Nagamine, Kazuya Sawada
  • Patent number: 10153423
    Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a pinned magnetization direction; a tunnel barrier layer interposed between the free layer and the pinned layer; and an under layer which is in contact with the free layer and includes a rare earth metal nitride.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: December 11, 2018
    Assignees: SK Hynix Inc., Toshiba Memory Corporation
    Inventors: Yang-Kon Kim, Guk-Cheon Kim, Jae-Hyoung Lee, Jong-Koo Lim, Ku-Youl Jung, Toshihiko Nagase, Youngmin Eeh
  • Patent number: 10103318
    Abstract: According to one embodiment, there is provided a magnetoresistive element, including a first magnetic layer, a nonmagnetic layer on the first magnetic layer, and a second magnetic layer on the nonmagnetic layer, wherein one of the first and second magnetic layers include one of Co and Fe, and a material having a higher standard electrode potential than Co and Fe.
    Type: Grant
    Filed: September 12, 2016
    Date of Patent: October 16, 2018
    Assignees: TOSHIBA MEMORY CORPORATION, SK HYNIX, INC.
    Inventors: Daisuke Watanabe, Yang Kon Kim, Makoto Nagamine, Youngmin Eeh, Koji Ueda, Toshihiko Nagase, Kazuya Sawada, Guk Cheon Kim, Bo Mi Lee, Won Joon Choi
  • Publication number: 20180284199
    Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a pinned magnetization direction; and a tunnel barrier layer between the free layer and the pinned layer, wherein the free layer may include a first magnetic layer; a second magnetic layer having a smaller perpendicular magnetic anisotropy energy density than the first magnetic layer; and a spacer interposed between the first magnetic layer and the second magnetic layer.
    Type: Application
    Filed: December 14, 2017
    Publication date: October 4, 2018
    Inventors: Ku-Youl JUNG, Guk-Cheon KIM, Toshihiko NAGASE, Daisuke WATANABE, Won-Joon CHOI, Youngmin EEH, Kazuya SAWADA
  • Patent number: 10090459
    Abstract: A magnetoresistive element includes a storage layer as a ferromagnetic layer which has magnetic anisotropy perpendicular to film planes, and in which a magnetization direction is variable, a reference layer as a ferromagnetic layer which has magnetic anisotropy perpendicular to film planes, and in which a magnetization direction is invariable, a tunnel barrier layer as a nonmagnetic layer formed between the storage layer and the reference layer, and a first underlayer formed on a side of the storage layer, which is opposite to a side facing the tunnel barrier layer, and containing amorphous W.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: October 2, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Daisuke Watanabe, Youngmin Eeh, Kazuya Sawada, Koji Ueda, Toshihiko Nagase
  • Publication number: 20180277745
    Abstract: According to one embodiment, a magnetic memory device includes a magnetoresistive element, the magnetoresistive element including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. The first magnetic layer includes first and second sub-magnetic layers each containing at least iron (Fe) and boron (B), and a concentration of boron (B) contained in the first sub-magnetic layer is different from a concentration of boron (B) contained in the second sub-magnetic layer.
    Type: Application
    Filed: September 12, 2017
    Publication date: September 27, 2018
    Applicants: TOSHIBA MEMORY CORPORATION, SK HYNIX INC.
    Inventors: Tadaaki OIKAWA, Toshihiko NAGASE, Youngmin EEH, Daisuke WATANABE, Kazuya SAWADA, Kenichi YOSHINO, Hiroyuki OHTORI, Yang Kon KIM, Ku Youl JUNG, Jong Koo LIM, Jae Hyoung LEE, Soo Man SEO, Sung Woong CHUNG, Tae Young LEE
  • Publication number: 20180269043
    Abstract: According to one embodiment, a film formation method using a magnetron sputtering apparatus including first and second magnets provided on first and second target holders, includes forming an insulating film on a wafer placed on a main surface of a wafer stage by sputtering first and second insulating targets set on the first and second target holders, wherein the wafer includes an effective area to be used for a product and an ineffective area outside the effective area, and when viewed from a direction perpendicular to the main surface of the wafer stage, at least a part of the first magnet overlaps the effective area of the wafer placed on the main surface of the wafer stage, and the entire second magnet does not overlap the effective area of the wafer placed on the main surface of the wafer stage.
    Type: Application
    Filed: September 14, 2017
    Publication date: September 20, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Koji UEDA, Koji YAMAKAWA, Toshihiko NAGASE, Youngmin EEH, Kazuya SAWADA
  • Publication number: 20180205006
    Abstract: A magnetoresistive memory device includes a first magnetic layer having a variable magnetization direction; a second magnetic layer, a magnetization direction of the second magnetic layer being invariable; a first nonmagnetic layer provided between the first magnetic layer and the second magnetic layer; and a second nonmagnetic layer provided on the first magnetic layer, which is opposite the first nonmagnetic layer. The first magnetic layer having a stacked layer structure in which amorphous magnetic material layer is sandwiched between crystalline magnetic material layers.
    Type: Application
    Filed: March 12, 2018
    Publication date: July 19, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Daisuke WATANABE, Toshihiko NAGASE, Youngmin EEH, Kazuya SAWADA, Makoto NAGAMINE, Tadaaki OIKAWA, Kenichi YOSHINO, Hiroyuki OHTORI
  • Patent number: 10026891
    Abstract: A magnetoresistive element including a first magnetic layer; a first nonmagnetic layer provided on the first magnetic layer, the first nonmagnetic layer formed of SrTiO3, SrFeO3, LaAlO3, NdCoO3, or BN; and a second magnetic layer provided on the first nonmagnetic layer, wherein the first nonmagnetic layer is lattice-matched to the first magnetic layer, and the second magnetic layer is lattice-matched to the first nonmagnetic layer.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: July 17, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Toshihiko Nagase, Tadashi Kai, Youngmin Eeh, Koji Ueda, Daisuke Watanabe, Kazuya Sawada, Hiroaki Yoda