Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first base fin protruding from the substrate and extending in a first direction, and a first fin type pattern protruding from the first base fin and extending in the first direction. The first base fin includes a first sidewall and a second sidewall, the first and second sidewalls extending in the first direction, the first sidewall opposite to the second sidewall, the first sidewall of the first base fin at least partially defines a first deep trench, the second sidewall of the first base fin at least partially defines a second deep trench, and a depth of the first deep trench is greater than a depth of the second deep trench.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first base fin protruding from the substrate and extending in a first direction, and a first fin type pattern protruding from the first base fin and extending in the first direction. The first base fin includes a first sidewall and a second sidewall, the first and second sidewalls extending in the first direction, the first sidewall opposite to the second sidewall, the first sidewall of the first base fin at least partially defines a first deep trench, the second sidewall of the first base fin at least partially defines a second deep trench, and a depth of the first deep trench is greater than a depth of the second deep trench.

Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first base fin protruding from the substrate and extending in a first direction, and a first fin type pattern protruding from the first base fin and extending in the first direction. The first base fin includes a first sidewall and a second sidewall, the first and second sidewalls extending in the first direction, the first sidewall opposite to the second sidewall, the first sidewall of the first base fin at least partially defines a first deep trench, the second sidewall of the first base fin at least partially defines a second deep trench, and a depth of the first deep trench is greater than a depth of the second deep trench.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first base fin protruding from the substrate and extending in a first direction, and a first fin type pattern protruding from the first base fin and extending in the first direction. The first base fin includes a first sidewall and a second sidewall, the first and second sidewalls extending in the first direction, the first sidewall opposite to the second sidewall, the first sidewall of the first base fin at least partially defines a first deep trench, the second sidewall of the first base fin at least partially defines a second deep trench, and a depth of the first deep trench is greater than a depth of the second deep trench.

Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction.

Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first base fin protruding from the substrate and extending in a first direction, and a first fin type pattern protruding from the first base fin and extending in the first direction. The first base fin includes a first sidewall and a second sidewall, the first and second sidewalls extending in the first direction, the first sidewall opposite to the second sidewall, the first sidewall of the first base fin at least partially defines a first deep trench, the second sidewall of the first base fin at least partially defines a second deep trench, and a depth of the first deep trench is greater than a depth of the second deep trench.

Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction.

Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction.

Abstract: Semiconductor devices are provided. A semiconductor device includes a channel region that protrudes from a substrate. The semiconductor device includes a gate line on the channel region. Moreover, the semiconductor device includes a gate isolation layer that is between a first portion of the gate line and a second portion of the gate line. The gate isolation layer is in contact with the gate line and includes a gap that is in the gate isolation layer. Related methods of manufacturing a semiconductor device are also provided.

Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a field insulating layer on the substrate, the field insulating layer wrapping a side wall of the fin type pattern, a gate electrode on the fin type pattern, the gate electrode extending in a second direction intersecting with the first direction, a first spacer on a side wall of a lower part of the gate electrode, and an etching stop layer extending along a side wall and an upper surface of an upper part of the gate electrode, along a side wall of the first spacer, and along an upper surface of the field insulating layer.

Abstract: Semiconductor devices are provided. A semiconductor device includes a channel region that protrudes from a substrate. The semiconductor device includes a gate line on the channel region. Moreover, the semiconductor device includes a gate isolation layer that is between a first portion of the gate line and a second portion of the gate line. The gate isolation layer is in contact with the gate line and includes a gap that is in the gate isolation layer. Related methods of manufacturing a semiconductor device are also provided.

Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a field insulating layer on the substrate, the field insulating layer wrapping a side wall of the fin type pattern, a gate electrode on the fin type pattern, the gate electrode extending in a second direction intersecting with the first direction, a first spacer on a side wall of a lower part of the gate electrode, and an etching stop layer extending along a side wall and an upper surface of an upper part of the gate electrode, along a side wall of the first spacer, and along an upper surface of the field insulating layer.

Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction.

Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction.

Abstract: A semiconductor device includes a substrate having an active pattern extending in a first direction, a first gate structure and a second gate structure extending in a second direction, intersecting the first direction, to traverse the active pattern, the first gate structure and the second gate structure isolated from each other while facing each other in the second direction, a gate isolation pattern disposed between the first gate structure and the second gate structure, the gate isolation pattern having a void, and a filling insulating portion positioned lower than upper surfaces of the first gate structure and the second gate structure within the gate isolation pattern, the filling insulating portion being connected to at least an upper end of the void.

Abstract: There is provided a semiconductor device capable of enhancing device performance by variably adjusting threshold voltage of a transistor having gate-all-around structure.

Abstract: Semiconductor devices are provided. The semiconductor device includes a first fin and a second fin on a substrate and a field insulation layer between the first fin and the second fin. The field insulation layer include a first insulation layer and a second insulation layer on the first insulation layer and connected to the first insulation layer. The second insulation layer is wider than the first insulation layer. A ratio of a top width to a bottom width of each of the first fin and the second fin exceeds 0.5.

Abstract: Semiconductor devices are provided. A semiconductor device includes a channel region that protrudes from a substrate. The semiconductor device includes a gate line on the channel region. Moreover, the semiconductor device includes a gate isolation layer that is between a first portion of the gate line and a second portion of the gate line. The gate isolation layer is in contact with the gate line and includes a gap that is in the gate isolation layer. Related methods of manufacturing a semiconductor device are also provided.