Abstract: A Doherty power amplifier of a wireless communication system is provided. The Doherty power amplifier includes a first stage including a first power amplifier and a second power amplifier. The Doherty power amplifier includes a second stage including a third power amplifier and a fourth power amplifier. The Doherty power amplifier includes a coupler between the first stage and the second stage. The Doherty power amplifier includes a load impedance connected to the second stage. A bias of the first power amplifier is applied differently from a bias of the second power amplifier. A bias of the third power amplifier is applied in the same manner as a bias of the fourth power amplifier.

Abstract: A display device includes a first pixel and a second pixel. The light emitting element of the second pixel and the driving circuit are disposed in the second area. The first pixel includes a silicon transistor and an oxide transistor disposed in the second area. The first pixel includes a first sub-light emitting element and a second sub-light emitting element disposed in a first area, and a first sub-pixel circuit and a second sub-pixel circuit disposed in a second area. A first connection wiring connecting a transistor included in the first sub-pixel circuit and the first sub-light emitting element, and a second connection wiring connecting a transistor included in the second sub-pixel circuit and the second sub-light emitting element are disposed on different layers and include a transparent conductive oxide.

Abstract: The disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long-Term Evolution (LTE). A Doherty power amplifier of a wireless communication system is provided. The Doherty power amplifier includes a first power amplifier, a second power amplifier, a first transmission line, a 4-port coupler, and a load impedance, and the 4-port coupler includes a first port, a second port, a third port, and a fourth port, the first power amplifier is coupled with the 4-port coupler through the first port, the second power amplifier is coupled with the 4-port coupler through the fourth port, the load impedance is coupled with the 4-port coupler through the third port, the first transmission line is disposed between the first power amplifier and the first port of the 4-port coupler, and the second port is an output end of the power amplifier.

Abstract: The disclosure relates to a 5th generation (5G) or a pre-5G communication system for supporting a higher data transmission rate after a 4th generation (4G) communication system such as long-term evolution (LTE). A Doherty power amplifier of a wireless communication system is provided.

Abstract: An average power tracking mode power amplifier is disclosed herein. The average power tracking mode power amplifier includes a Power Amplifier (PA), a first Direct Current (DC)-DC voltage converter, and a second DC-DC voltage converter. The PA includes a driver stage configured to be driven by first drive voltage and a main amplification stage configured to be driven by second drive voltage. The first DC-DC voltage converter generates the first drive voltage from power voltage so that the first drive voltage is equal to or higher than the power voltage, and applies the generated first drive voltage to the driver stage. The second DC-DC voltage converter generates the second drive voltage from the power voltage so that the second drive voltage is higher than the first drive voltage, and applies the generated second drive voltage to the main amplification stage.

Abstract: A compact load network for a Doherty power amplifier includes a first inductor, a second inductor, a series capacitor, and a filter unit. The first inductor is configured such that one terminal thereof is connected to a drain voltage terminal and a remaining terminal thereof is connected in parallel to an output terminal of a first transistor. The second inductor is configured such that one terminal thereof is connected to a drain voltage terminal and a remaining terminal thereof is connected in parallel to an output terminal of a second transistor. The series capacitor is connected in series between the output terminal of the first transistor and the output terminal of the second transistor. The filter unit is connected between the output terminal of the second transistor and a signal output terminal.

Abstract: Disclosed herein is an active rectifier. The rectifier includes a rectifier unit, a driver unit, and a switching device control circuit unit. The rectifier unit includes first and fourth transistors configured to become conductive when the voltage of an alternating current (AC) input is negative and apply the current of the AC input to a rectifier capacitor, and second and third transistors configured to become conductive when the voltage of the AC input is positive and apply the current of the AC input to the rectifier capacitor. The driver unit outputs first to fourth drive control signals, and drives the first to fourth transistors. The switching device control circuit unit compares the first drive control signal and the second drive control signal with the AC input, and outputs switching device control signals to delay the first to fourth drive control signals based on the extents to delay.

Abstract: An input driver includes a power converting unit and a level adjusting unit. The power converting unit is configured to generate a first power and a second power having an anti-phase relationship based on input power, and process the first power and the second power as differential inputs to output a third power. The level adjusting unit is configured to adjust a voltage level of the third power and output the adjusted power as an input to a power amplifier.

Abstract: A power amplification apparatus includes a multiple output bias voltage generation unit, a dynamic bias modulator, and a power amplifier. The multiple output bias voltage generation unit generates first and second bias voltages using an inductor coupled between an input voltage and a plurality of capacitors. The capacitors are connected to the inductor in a non-overlapping manner. The dynamic bias modulator outputs the first bias voltage or the second bias voltage as a variable bias voltage based on results of comparing voltage of an envelope signal of a radio frequency (RF) signal to an envelope reference voltage. The power amplifier is biased in response to the variable bias voltage, amplifies power of the RF signal, and outputs the amplified RF signal to an antenna.

Abstract: A power amplification apparatus includes a multiple output bias voltage generation unit, a dynamic bias modulator, and a power amplifier. The multiple output bias voltage generation unit generates first and second bias voltages using an inductor coupled between an input voltage and a plurality of capacitors. The capacitors are connected to the inductor in a non-overlapping manner. The dynamic bias modulator outputs the first bias voltage or the second bias voltage as a variable bias voltage based on results of comparing voltage of an envelope signal of a radio frequency (RF) signal to an envelope reference voltage. The power amplifier is biased in response to the variable bias voltage, amplifies power of the RF signal, and outputs the amplified RF signal to an antenna.

Abstract: An envelope tracking power amplifier is disclosed herein. The envelope tracking power amplifier includes a multi-mode bias modulator and a power amplifier. The multi-mode bias modulator generates an envelope-modulated bias voltage from the envelope signal of an radio frequency (RF) signal whose power is to be amplified by using a linear amplifier and a switching amplifier each having varying current driving capability in response to an operation mode control signal that determines any one of low-level mode and high-level mode. The power amplifier is biased in response to the envelope-modulated bias voltage, amplifies the RF signal, and outputs the amplified RF signal to an antenna.

Abstract: An average power tracking mode power amplifier is disclosed herein. The average power tracking mode power amplifier includes a Power Amplifier (PA), a first Direct Current (DC)-DC voltage converter, and a second DC-DC voltage converter. The PA includes a driver stage configured to be driven by first drive voltage and a main amplification stage configured to be driven by second drive voltage. The first DC-DC voltage converter generates the first drive voltage from power voltage so that the first drive voltage is equal to or higher than the power voltage, and applies the generated first drive voltage to the driver stage. The second DC-DC voltage converter generates the second drive voltage from the power voltage so that the second drive voltage is higher than the first drive voltage, and applies the generated second drive voltage to the main amplification stage.

Abstract: A multi-mode bias modulator operating in envelope tracking mode or average power tracking mode and an envelope tracking power amplifier using the same are disclosed. The envelope tracking power amplifier includes a multi-mode bias modulator and a power amplifier. The multi-mode bias modulator generates a variable bias voltage using a linear amplifier and a switching amplifier operating in envelope tracking mode or average power tracking mode in accordance with an operation mode control signal that determines any one of envelope tracking mode and average power tracking mode. The power amplifier is biased in response to the variable bias voltage, power-amplifies a radio frequency (RF) signal, and outputs the amplified RF signal to an antenna.

Abstract: An input driver includes a power converting unit and a level adjusting unit. The power converting unit is configured to generate a first power and a second power having an anti-phase relationship based on input power, and process the first power and the second power as differential inputs to output a third power. The level adjusting unit is configured to adjust a voltage level of the third power and output the adjusted power as an input to a power amplifier.

Abstract: An apparatus and a method for balanced power amplification are provided. An amplifier includes a splitter configured to split an input signal into a first input signal and a second input signal that include a 90° phase difference. The amplifier further includes a first power amplifier (PA) configured to amplify the first input signal to generate a first output signal. The amplifier further includes a second PA configured to amplify the second input signal to generate a second output signal. The amplifier further includes a combiner configured to combine the first output signal and the second output signal that include the 90° phase difference to generate an output signal.

Abstract: A multi-mode bias modulator operating in envelope tracking mode or average power tracking mode and an envelope tracking power amplifier using the same are disclosed. The envelope tracking power amplifier includes a multi-mode bias modulator and a power amplifier. The multi-mode bias modulator generates a variable bias voltage using a linear amplifier and a switching amplifier operating in envelope tracking mode or average power tracking mode in accordance with an operation mode control signal that determines any one of envelope tracking mode and average power tracking mode. The power amplifier is biased in response to the variable bias voltage, power-amplifies a radio frequency (RF) signal, and outputs the amplified RF signal to an antenna.

Abstract: An envelope tracking power amplifier is disclosed herein. The envelope tracking power amplifier includes a multi-mode bias modulator and a power amplifier. The multi-mode bias modulator generates an envelope-modulated bias voltage from the envelope signal of an radio frequency (RF) signal whose power is to be amplified by using a linear amplifier and a switching amplifier each having varying current driving capability in response to an operation mode control signal that determines any one of low-level mode and high-level mode. The power amplifier is biased in response to the envelope-modulated bias voltage, amplifies the RF signal, and outputs the amplified RF signal to an antenna.

Abstract: An apparatus for collecting wireless is provided. The apparatus includes an antenna and a collection circuit. The antenna generates an alternating current (AC) voltage from a radio wave. The collection circuit generates a direct current (DC) voltage corresponding to the AC voltage, determines whether the DC voltage is lower than a preset value, and changes an internal impedance of the collection circuit if it is determined that the DC voltage is lower than the preset voltage.

Abstract: An apparatus and a method for balanced power amplification are provided. An amplifier includes a splitter configured to split an input signal into a first input signal and a second input signal that include a 90° phase difference. The amplifier further includes a first power amplifier (PA) configured to amplify the first input signal to generate a first output signal. The amplifier further includes a second PA configured to amplify the second input signal to generate a second output signal. The amplifier further includes a combiner configured to combine the first output signal and the second output signal that include the 90° phase difference to generate an output signal.

Abstract: An apparatus and method for removing a transmission leakage signal from a radio frequency identification (RFID) reader are provided. The apparatus includes a removing unit having a device of a large impedance and a phase shifter capable of a wide range phase change with respect to a leakage signal, thereby optimally removing the transmission leakage signal irrespective of a change in the frequency characteristics and a change in the length of a cable.