Patents by Inventor Young-rae Cho
Young-rae Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10682690Abstract: A centrifugal casting apparatus for different materials may include a mold having a shape corresponding to a shape of an outer surface of a casting to be produced, and having a cavity receiving molten metals therein, a molten metal guide inserted into the mold and configured to guide the molten metals so that the molten metals are separately injected into the mold, a guide fixing support fixing the molten metal guide to a predetermined position, and a motor configured to rotate the mold around a rotation axis.Type: GrantFiled: November 30, 2018Date of Patent: June 16, 2020Assignees: Hyundai Motor Company, Kia Motors CorporationInventors: Hyo-Moon Joo, Ji-Yong Lee, Yoon-Ki Lee, Young-Chan Kim, Cheol-Ung Lee, Jun-Min Lee, Mun-Gu Kang, Young-Rae Cho, Min-Soo Kim, Jae-Gi Sim
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Publication number: 20190168294Abstract: A centrifugal casting apparatus for different materials may include a mold having a shape corresponding to a shape of an outer surface of a casting to be produced, and having a cavity receiving molten metals therein, a molten metal guide inserted into the mold and configured to guide the molten metals so that the molten metals are separately injected into the mold, a guide fixing support fixing the molten metal guide to a predetermined position, and a motor configured to rotate the mold around a rotation axis.Type: ApplicationFiled: November 30, 2018Publication date: June 6, 2019Inventors: Hyo-Moon JOO, Ji-Yong LEE, Yoon-Ki LEE, Young-Chan KIM, Cheol-Ung LEE, Jun-Min LEE, Mun-Gu KANG, Young-Rae CHO, Min-Soo KIM, Jae-Gi SIM
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Patent number: 7808921Abstract: A method for identifying a bridge node in a network using a processor and memory unit in a specially programmed special purpose-purpose computer including the steps of, for each node in a plurality of nodes in the network: determining a global metric proportional to total traffic flow in the network and through the node; determining a local metric proportional to traffic flow between the node and each second node in the network connected to the node and traffic flow between each second node and each third node in the network connected to a second node; determining a second local metric proportional to the respective traffic flows between each node and each second node; and calculating a respective combination of the global metric and the first and second local metrics; and selecting, a bridge node from among the plurality of nodes based on the respective combinations.Type: GrantFiled: May 18, 2007Date of Patent: October 5, 2010Assignee: The Research Foundation of State University of New YorkInventors: Aidong Zhang, Murali Ramanathan, Woo-Chang Hwang, Young-Rae Cho
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Publication number: 20070286218Abstract: A method for identifying a bridge node in a network using a processor and memory unit in a specially programmed special purpose-purpose computer including the steps of, for each node in a plurality of nodes in the network: determining a global metric proportional to total traffic flow in the network and through the node; determining a local metric proportional to traffic flow between the node and each second node in the network connected to the node and traffic flow between each second node and each third node in the network connected to a second node; determining a second local metric proportional to the respective traffic flows between each node and each second node; and calculating a respective combination of the global metric and the first and second local metrics; and selecting, a bridge node from among the plurality of nodes based on the respective combinations.Type: ApplicationFiled: May 18, 2007Publication date: December 13, 2007Applicant: The Research Foundation of State University of New YorkInventors: Aidong Zhang, Murali Ramanathan, Woo-Chang Hwang, Young-Rae Cho
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Patent number: 6690116Abstract: A high-resolution field emission display that applies a field emission device (or a field emission array) being an electron source element to a flat panel display device. The field emission display includes an upper plate and a lower plate that face each other, wherein the lower plate and the upper plate are vacuum-packaged in parallel positions. A dot pixel of the lower plate includes a high-voltage amorphous silicon thin film transistor formed on the glass substrate of the lower plate, a diode type field emission film partially formed on the drain of the high-voltage amorphous silicon TFT, a passivation insulation layer formed on the high-voltage amorphous silicon TFT and the lateral side of the diode type field emission film, and an electron beam focusing electrode/light-shading film which vertically overlaps with the high-voltage amorphous silicon TFT on some parts of the passivation insulation layer and is formed on a lateral side of the diode type field emission film.Type: GrantFiled: May 31, 2001Date of Patent: February 10, 2004Assignee: Electronics and Telecommunications Research InstituteInventors: Yoon-Ho Song, Young-Rae Cho, Seung-Youl Kang, Moon-Youn Jung, Chi-Sun Hwang, Jin-Ho Lee, Kyoung-Ik Cho
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Patent number: 6682383Abstract: A cathode structure for a field emission device, which is an essential component of a field emission device, and a method of fabricating the same are provided. An emitter material for electron emission constituting cathodes is formed in a particulate emitter, the particulate emitter is formed of a material from which electrons can be easily emitted at a low electric field. A significant advantage of the present invention over a conventional art is that the present invention patterns an emitter material to a cathode electrode using a photolithography process or a lift-off process. In the lift-off process, the emitting compound is patterned using a sacrifice layer. Also, in another embodiment of the present invention, there is disclosed a method of easily fabricating cathodes for a triode-type field emission device using a particulate emitter material at a low process temperature.Type: GrantFiled: May 17, 2001Date of Patent: January 27, 2004Assignee: Electronics and Telecommunications Research InstituteInventors: Young-Rae Cho, Jin-Ho Lee, Yoon-Ho Song, Seung-Youl Kang, Moon-Youn Jung, Kyoung-Ik Cho, Do-Hyung Kim, Chi-Sun Hwang
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Publication number: 20020080099Abstract: A high-resolution field emission display that applies a field emission device(or a field emission array) being an electron source element to a flat panel display device. The field emission display includes an upper plate and a lower plate that fac each other, wherein the lower plate and the upper plate are vacuum-packaged in parallel positions. A dot pixel of the lower plate includes a high-voltage amorphous silicon thin film transistor formed on the glass substrate of the lower plate, a diode type field emission film partially formed on the drain of the high-voltage amorphous silicon TFT, a passivation insulation layer formed on the high-voltage amorphous silicon TFT and the lateral side of the diode type field emission film, and an electron beam focusing electrode/light-shading film which vertically overlaps with the high-voltage amorphous silicon TFT on some parts of the passivation insulation layer and is formed on a lateral side of the diode type field emission film.Type: ApplicationFiled: May 31, 2001Publication date: June 27, 2002Inventors: Yoon-Ho Song, Young-Rae Cho, Seung-Youl Kang, Moon-Youn Jung, Chi-Sun Hwang, Jin-Ho Lee, Kyoung-Ik Cho
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Patent number: 6352915Abstract: A method for manufacturing a semiconductor package comprising the steps of (a) forming a plurality of bumps on a metal frame and a bridge for connecting and supporting the bumps, (b) coating liquid solder on the bumps, (c) aligning the frame with respect to a semiconductor substrate where patterns are formed so that the bumps are positioned on the patterns, (d) soldering the bumps on the patterns, and (e) separating the bumps from the frame by breaking a connecting portion of the bumps and the bridge.Type: GrantFiled: October 6, 2000Date of Patent: March 5, 2002Assignee: Samsung Aerospace Industries, Ltd.Inventors: Young-rae Cho, Wook-yeol Ryu, Sang-kyun Lee
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Publication number: 20010044251Abstract: A cathode structure for a field emission device, which is an essential component of a field emission device, and a method of fabricating the same are provided. An emitter material for electron emission constituting cathodes is formed in a particulate emitter, the particulate emitter is formed of a material from which electrons can be easily emitted at a low electric field. A significant advantage of the present invention over a conventional art is that the present invention patterns an emitter material to a cathode electrode using a photolithography process or a lift-off process. In the lift-off process, the emitting compound is patterned using a sacrifice layer. Also, in another embodiment of the present invention, there is disclosed a method of easily fabricating cathodes for a triode-type field emission device using a particulate emitter material at a low process temperature.Type: ApplicationFiled: May 17, 2001Publication date: November 22, 2001Inventors: Young-Rae Cho, Jin-Ho Lee, Yoon-Ho Song, Seung-Youl Kang, Moon-Youn Jung, Kyoung-Ik Cho, Do-Hyung Kim, Chi-Sun Hwang