Patents by Inventor Young Seok Jeong
Young Seok Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12261174Abstract: A transistor device includes a substrate, a source region provided on the substrate, a drain region spaced apart from the source region in a direction parallel to a top surface of the substrate, a pair of constant current generating patterns provided in the substrate to be adjacent to the source region and the drain region, respectively, a gate electrode provided on the substrate and between the source region and the drain region, and a gate insulating film interposed between the gate electrode and the substrate, wherein, the pair of constant current generating patterns generate a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.Type: GrantFiled: December 16, 2019Date of Patent: March 25, 2025Assignee: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi, Woo Seok Kim
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Patent number: 12261312Abstract: The battery rack includes a plurality of battery packs vertically arranged, each battery pack including a plurality of secondary batteries stacked in a direction, and a pack housing having an internal space to receive the plurality of secondary batteries and configured to be supplied with a fire extinguishing liquid when an internal temperature equals or rises above a predetermined temperature, and a rack case having a receiving space to receive the plurality of battery packs, and including a plurality of rack plates, each having a mounting surface on which the battery pack is mounted, the mounting surface sloping at a predetermined angle with declining height as it goes in any one direction, and an extension portion having an end of any one direction extending further outward than the lower battery pack.Type: GrantFiled: March 4, 2021Date of Patent: March 25, 2025Assignee: LG ENERGY SOLUTION, LTD.Inventors: Ji-Won Jeong, Seung-Hyun Kim, Young-Seok Lee, Kyung-Hyun Bae, Jin-Kyu Shin
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Publication number: 20250083217Abstract: An embodiment core molding system includes an upper hopper partitioned to define a first accommodating part that accommodates first core sand coated with an organic binder and a second accommodating part that accommodates pure sand, a lower hopper disposed under the upper hopper and connected to the first and second accommodating parts, the lower hopper being configured to measure weights of the first core sand and the pure sand, a mixer connected to the lower hopper, wherein the mixer is configured to allow the first core sand to pass directly therethrough and to accommodate the pure sand, a binder supply unit connected to the mixer and configured to supply an inorganic binder into the mixer, and a core mold configured to mold each of the first core sand and second core sand into a preset shape, the second core sand including the pure sand coated with the inorganic binder.Type: ApplicationFiled: September 4, 2024Publication date: March 13, 2025Inventors: Hee Seok Jeong, Jin Shik Lee, Kyoung Yong Kim, Young Nam Jung, Jin Su Lee, Sang June Lee, Chang Il Seo
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Publication number: 20240138680Abstract: The present invention relates to a calibration cradle for a three-dimensional scanner. Particularly, the calibration cradle comprises: a cradle body into which a front end portion of a three-dimensional scanner is inserted and seated; a calibration pattern plate (hereinafter, abbreviated as “pattern plate”) which is disposed inside the cradle body to correct the scanning of the three-dimensional scanner; and a pattern movement part which automatically axially rotates and axially reciprocates the pattern plate in the cradle body when the three-dimensional scanner is coupled to the cradle body, whereby the present invention provides an advantage of improving the convenience and reliability of performing calibration.Type: ApplicationFiled: February 15, 2022Publication date: May 2, 2024Applicant: MEDIT CORP.Inventors: Dong Hoon LEE, Myoung Woo SONG, Young Seok JEONG
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Publication number: 20240115138Abstract: The present disclosure relates to a calibration cradle for a three-dimensional scanner. In particular, the calibration cradle includes: a fixed case having an internal space formed therein; a pattern plate provided inside the fixed case and provided to calibrate the three-dimensional scanner comprising a camera; a movable case into which at least a portion of the three-dimensional scanner is inserted such that the camera faces the pattern plate, the movable case being configured to move to allow the three-dimensional scanner to move by at least one of rotational movement or vertical movement; and a movement driver configured to provide a driving force to move at least one of the movable case or the pattern plate. The calibration cradle provides an advantage of improving the reliability of calibration and user convenience.Type: ApplicationFiled: February 15, 2022Publication date: April 11, 2024Applicant: MEDIT CORP.Inventors: Dong Hoon LEE, Young Seok JEONG
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Patent number: 8780049Abstract: There is provided an alphabetic character input apparatus including a data storage unit configured to store therein alphabetic character assignment information of each of keys in an alphabetic character input section and a program for inputting an alphabetic character; a key input unit configured to detect a key manipulation signal of a user to select an alphabetic character assigned to each of the keys; and a memory configured to store therein alphabetic character assignment information of a key corresponding to a key manipulation signal lately input by the user such that the alphabetic character assignment information of the key is assigned to a clone key.Type: GrantFiled: September 25, 2009Date of Patent: July 15, 2014Assignee: Any Future Technology Co., Ltd.Inventors: Young Seok Jeong, Seon Hye Chung, Tae Han Kim
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Publication number: 20110175819Abstract: There is provided an alphabetic character input apparatus including a data storage unit configured to store therein alphabetic character assignment information of each of keys in an alphabetic character input section and a program for inputting an alphabetic character; a key input unit configured to detect a key manipulation signal of a user to select an alphabetic character assigned to each of the keys; and a memory configured to store therein alphabetic character assignment information of a key corresponding to a key manipulation signal lately input by the user such that the alphabetic character assignment information of the key is assigned to a clone key.Type: ApplicationFiled: September 25, 2009Publication date: July 21, 2011Applicant: ANY FUTURE TECHNOLOGY CO. LTD.Inventors: Young Seok Jeong, Seon Hye Chung, Tae Han Kim
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Patent number: 7732304Abstract: A method of manufacturing a semiconductor device according to embodiments includes forming an interlayer dielectric film with a damascene pattern over a semiconductor substrate having a lower metal wire. A seed layer may be formed over the interlayer dielectric film including the damascene pattern. Impurities generated during the formation of the seed layer be removed through an annealing process using H2. A copper wire may then be formed by filling the damascene pattern.Type: GrantFiled: June 24, 2008Date of Patent: June 8, 2010Assignee: Dongbu HiTek Co., Ltd.Inventor: Young-Seok Jeong
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Patent number: 7605074Abstract: Provided is a CMP method. According to the CMP method, an interlayer insulating layer having two or more layers is etched to form a trench and/or via hole, and a combined thickness of the two or more layers are measured. A barrier metal layer and a metal layer are sequentially formed in the trench and/or via hole. Portions of the metal layer, the barrier metal layer and the interlayer insulating layer are removed. After that, the combined thickness of the two or more insulating layers is measured again.Type: GrantFiled: August 29, 2006Date of Patent: October 20, 2009Assignee: Dongbu Electronics Co., Ltd.Inventor: Young Seok Jeong
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Publication number: 20090004769Abstract: A method for manufacturing an image sensor is disclosed. The manufacturing method includes forming a unit pixel including a photodiode and a gate on a semiconductor substrate, forming an interlayer insulating layer on the semiconductor substrate including the unit pixel, planarizing the interlayer insulating layer, forming a protection layer with SiH4 on the interlayer insulating layer, and planarizing the protection layer.Type: ApplicationFiled: June 24, 2008Publication date: January 1, 2009Applicant: DONGBU HITEK CO., LTD.Inventors: Young Seok JEONG, Han Choon LEE
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Publication number: 20080318414Abstract: A method of manufacturing a semiconductor device according to embodiments includes forming an interlayer dielectric film with a damascene pattern over a semiconductor substrate having a lower metal wire. A seed layer may be formed over the interlayer dielectric film including the damascene pattern. Impurities generated during the formation of the seed layer be removed through an annealing process using H2. A copper wire may then be formed by filling the damascene pattern.Type: ApplicationFiled: June 24, 2008Publication date: December 25, 2008Inventor: Young-Seok Jeong
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Publication number: 20040243424Abstract: The present invention relates to methods and systems for marketing by a medium of virtual items. More particularly, the present invention relates to methods and systems or combining the merits of real life and cyber space by importing a concept of an item from the cyber space, and as a result, providing various services, such as life design, education, entertainment and consulting, which are closely related to the life style of a user.Type: ApplicationFiled: February 9, 2004Publication date: December 2, 2004Inventor: Young-Seok Jeong