Patents by Inventor Younho HEO
Younho HEO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240038824Abstract: Discussed is an assembly substrate structure of a display device including a semiconductor light emitting device and a display device having the same. The assembly substrate structure of the display device including a semiconductor light emitting device can include an assembly substrate, a first assembly electrode and a second assembly electrode disposed spaced apart from each other on the assembly substrate, a magnetic structure disposed under the first assembly electrode and the second assembly electrode and an insulating layer disposed between the first and second assembly electrodes and the magnetic structure.Type: ApplicationFiled: July 28, 2023Publication date: February 1, 2024Applicants: LG ELECTRONICS INC., LG DISPLAY CO., LTD.Inventors: Younho HEO, Kwangheon KIM
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Patent number: 11798921Abstract: Discussed is an assembly substrate used for a display device manufacturing method of mounting semiconductor light-emitting diodes on the assembly substrate at preset positions using electric field and magnetic field. The assembly substrate includes a base portion, a plurality of assembly electrodes on the base portion, a dielectric layer on the base portion to cover the assembly electrodes, a barrier wall on the base portion, and a metal shielding layer on the base portion, wherein the metal shielding layer overlaps the barrier wall.Type: GrantFiled: November 18, 2021Date of Patent: October 24, 2023Assignee: LG ELECTRONICS INC.Inventors: Changseo Park, Jinhyung Lee, Jungsub Kim, Seongmin Moon, Younho Heo
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Publication number: 20230317669Abstract: A display device according to the present invention is characterized by comprising: a base part; assembly electrodes extending in one direction and formed on the base part; a dielectric layer formed so as to cover the assembly electrodes; a barrier rib part stacked on the dielectric layer while forming holes so as to overlap the assembly electrodes; semiconductor light-emitting elements disposed inside the holes; and wiring electrodes electrically connected to the semiconductor light-emitting elements, wherein the assembly electrodes are formed so as to include Al, and the holes include AlOx.Type: ApplicationFiled: August 11, 2020Publication date: October 5, 2023Applicant: LG ELECTRONICS INC.Inventors: Jinhyung LEE, Younho HEO, Kisu KIM
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Publication number: 20230299055Abstract: A method for manufacturing a substrate for manufacturing a display device, according to the present invention, comprises the steps of: (a) forming, at predetermined intervals, assembly electrodes extending in one direction on a base part, and forming a dielectric layer so as to cover the assembly electrodes; (b) forming, on the dielectric layer, metal patterns so as to overlap the assembly electrodes; (c) forming partition parts on the dielectric layer so as to cover the metal patterns, and then forming assembly holes so as to overlap the metal patterns; and (d) removing the metal patterns exposed through the assembly holes, wherein, in step (d), a groove part is formed on the surface of each partition part, which forms the inner surface of each assembly hole, as the metal patterns are removed.Type: ApplicationFiled: August 10, 2020Publication date: September 21, 2023Applicant: LG ELECTRONICS INC.Inventors: Changseo PARK, Jinhyung LEE, Younho HEO, Yongil SHIN, Kisu KIM
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Publication number: 20230079059Abstract: A substrate for manufacturing a display device according to the present invention includes a base part; assembly electrodes extending in one direction and disposed on the base part at predetermined intervals; an etch stop layer formed on at least a portion of the base part; a barrier wall part formed on the etch stop layer while forming a cell on which a semiconductor light emitting device is mounted along an extension direction of the assembly electrodes. The etch stop layer is formed on at least a first region in which the assembly electrodes are formed among the entire region of the base part.Type: ApplicationFiled: February 13, 2020Publication date: March 16, 2023Applicant: LG ELECTRONICS INC.Inventors: Younho HEO, Jinhyung LEE, Seongmin MOON, Changseo PARK
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Publication number: 20230015395Abstract: Discussed is a display device including a base portion; a first electrode formed on the base portion; a barrier rib portion stacked on the first electrode while forming a plurality of cells; a second electrode formed on the barrier rib portion; and semiconductor light emitting diodes seated in the plurality of cells, wherein the first electrode and the second electrode are spaced apart from each other with the barrier rib portion disposed therebetween.Type: ApplicationFiled: December 18, 2019Publication date: January 19, 2023Applicant: LG ELECTRONICS INC.Inventors: Jinhyung LEE, Changseo PARK, Younho HEO, Kisu KIM, Seongmin MOON
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Publication number: 20220077122Abstract: Discussed is an assembly substrate used for a display device manufacturing method of mounting semiconductor light-emitting diodes on the assembly substrate at preset positions using electric field and magnetic field. The assembly substrate includes a base portion, a plurality of assembly electrodes on the base portion, a dielectric layer on the base portion to cover the assembly electrodes, a barrier wall on the base portion, and a metal shielding layer on the base portion, wherein the metal shielding layer overlaps the barrier wall.Type: ApplicationFiled: November 18, 2021Publication date: March 10, 2022Applicant: LG ELECTRONICS INC.Inventors: Changseo PARK, Jinhyung LEE, Jungsub KIM, Seongmin MOON, Younho HEO
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Patent number: 11211366Abstract: The present disclosure relates to an assembly substrate used for a display device manufacturing method in which semiconductor light-emitting diodes are placed on the assembly substrate at preset positions using electric field and magnetic field. Specifically, the assembly substrate includes a base portion, a plurality of assembly electrodes extending in one direction and disposed on the base portion, a dielectric layer stacked on the base portion to cover the assembly electrodes, a barrier wall formed on the base portion and having a plurality of recesses for guiding the semiconductor light-emitting diodes to the preset positions, and a metal shielding layer formed on the base portion, wherein the metal shielding layer overlaps the barrier wall so that an electric field formed between the assembly electrodes is shielded.Type: GrantFiled: March 30, 2020Date of Patent: December 28, 2021Assignee: LG ELECTRONICS INC.Inventors: Changseo Park, Jinhyung Lee, Jungsub Kim, Seongmin Moon, Younho Heo
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Publication number: 20200395345Abstract: The present disclosure relates to an assembly substrate used for a display device manufacturing method in which semiconductor light-emitting diodes are placed on the assembly substrate at preset positions using electric field and magnetic field. Specifically, the assembly substrate includes a base portion, a plurality of assembly electrodes extending in one direction and disposed on the base portion, a dielectric layer stacked on the base portion to cover the assembly electrodes, a barrier wall formed on the base portion and having a plurality of recesses for guiding the semiconductor light-emitting diodes to the preset positions, and a metal shielding layer formed on the base portion, wherein the metal shielding layer overlaps the barrier wall so that an electric field formed between the assembly electrodes is shielded.Type: ApplicationFiled: March 30, 2020Publication date: December 17, 2020Applicant: LG ELECTRONICS INC.Inventors: Changseo PARK, Jinhyung LEE, Jungsub KIM, Seongmin MOON, Younho HEO
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Patent number: 10861991Abstract: A compound semiconductor solar cell and a method of manufacturing the same are disclosed. The compound semiconductor solar cell includes a compound semiconductor layer, a front electrode positioned on a front surface of the compound semiconductor layer, a back electrode positioned on a back surface of the compound semiconductor layer, a defect portion disposed within the compound semiconductor layer and physically and electrically connected to the back electrode, and an isolation portion surrounding the defect portion.Type: GrantFiled: February 23, 2018Date of Patent: December 8, 2020Assignee: LG ELECTRONICS INC.Inventors: Soohyun Kim, Gunho Kim, Hyun Lee, Wonseok Choi, Younho Heo
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Patent number: 10529874Abstract: According to an aspect of the present invention, there is provided a method for manufacturing a compound semiconductor solar cell, comprising: forming a sacrificial layer on one surface of a mother substrate; forming a compound semiconductor layer on the sacrificial layer; forming a first protective layer formed of a compound semiconductor on the compound semiconductor layer; depositing a second passivation layer on the first passivation layer; attaching a first lamination film on the second protective layer; separating the compound semiconductor layer, the first and second protective layers, and the first lamination film from the mother substrate by performing an ELO process to remove the sacrificial layer; forming a back electrode on the compound semiconductor layer; attaching a second lamination film on the back electrode; removing the first lamination film; removing the second protective layer; removing the first protective layer; and forming a front electrode on the compound semiconductor layer.Type: GrantFiled: April 12, 2018Date of Patent: January 7, 2020Assignee: LG Electronics Inc.Inventors: Younho Heo, Soohyun Kim, Hyun Lee, Changhyun Jeong
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Publication number: 20180301580Abstract: According to an aspect of the present invention, there is provided a compound semiconductor solar cell, comprising a first cell, the first cell including: a first base layer formed of a gallium indium phosphide (GaInP)-based compound semiconductor; a first emitter layer forming a p-n junction with the first base layer; a first window layer positioned on a front surface of the first base layer or the first emitter layer; and a first back surface field layer positioned on a back surface of the first emitter layer or the first base layer, wherein the first window layer of the first cell is formed of a four-component III-V compound semiconductor.Type: ApplicationFiled: April 10, 2018Publication date: October 18, 2018Applicant: LG ELECTRONICS INC.Inventors: Soohyun KIM, Hyun LEE, Wonseok CHOI, Younho HEO
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Publication number: 20180301577Abstract: According to an aspect of the present invention, there is provided a method for manufacturing a compound semiconductor solar cell, comprising: forming a sacrificial layer on one surface of a mother substrate; forming a compound semiconductor layer on the sacrificial layer; forming a first protective layer formed of a compound semiconductor on the compound semiconductor layer; depositing a second passivation layer on the first passivation layer; attaching a first lamination film on the second protective layer; separating the compound semiconductor layer, the first and second protective layers, and the first lamination film from the mother substrate by performing an ELO process to remove the sacrificial layer; forming a back electrode on the compound semiconductor layer; attaching a second lamination film on the back electrode; removing the first lamination film; removing the second protective layer; removing the first protective layer; and forming a front electrode on the compound semiconductor layer.Type: ApplicationFiled: April 12, 2018Publication date: October 18, 2018Inventors: Younho HEO, Soohyun KIM, Hyun LEE, Changhyun JEONG
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Publication number: 20180248059Abstract: A compound semiconductor solar cell and a method of manufacturing the same are disclosed. The compound semiconductor solar cell includes a compound semiconductor layer, a front electrode positioned on a front surface of the compound semiconductor layer, a back electrode positioned on a back surface of the compound semiconductor layer, a defect portion disposed within the compound semiconductor layer and physically and electrically connected to the back electrode, and an isolation portion surrounding the defect portion.Type: ApplicationFiled: February 23, 2018Publication date: August 30, 2018Applicant: LG ELECTRONICS INC.Inventors: Soohyun KIM, Gunho KIM, Hyun LEE, Wonseok CHOI, Younho HEO