Abstract: A memory circuit includes a plurality of storage areas each designated by one of a plurality of addresses. The control circuit stores a plurality of values, all of which are different from each other, in the plurality of storage areas, generates a first random number, obtains a first address that is one of the plurality of addresses using the first random number, reads a first value stored in a first storage area designated by the first address, and reads a second value stored in a second storage area designated by a second address. The second address is an address having the largest value among a range of addresses from which the first address can be obtained. The control circuit writes the second value into the first storage area after reading the first value therefrom. The control circuit outputs the first value as one value of an output random number.