Abstract: An SPUF based on combinational logic and scan chain comprises an external stimulus source, a combinational logic circuit module, a scan chain circuit module, a data processing module and n switch circuits SW0, SW1, . . . , SWn-1, n=2m, and m is an integer greater than or equal to 1; combinational logic circuit module comprises n switch circuits S0, S1, . . . , Sn-1 and a combinational logic circuit; the scan chain circuit module comprises n scan flip-flops (SFFs) SFF0, SFF1, . . . , SFFn-1; each of the n switch circuits SW0, SW1, . . . , SWn-1 and the n switch circuits S0, S1, . . . , Sn-1 is implemented by a 2-to-1 multiplexer. The SPUF based on combinational logic and scan chain has high uniqueness and randomness, requires a few clock frequency changes, and has high reliability, more bits of responses and high security.