Patents by Inventor Youzhe Fan

Youzhe Fan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230412196
    Abstract: A system comprises a forward error correction decoder comprising syndrome computation circuitry, key-equation solver circuitry, and search and evaluator circuitry. The syndrome computation circuitry may comprise a plurality of syndrome compute units connected in parallel. The syndrome computation circuitry may be dynamically configurable to vary a quantity of the syndrome compute units used for processing of a codeword based on conditions of a channel over which the codeword was received. The syndrome computation circuitry may be operable to use a first quantity of the syndrome compute units for processing of a first codeword received over the channel when the channel is characterized by a first bit error rate and a second quantity of the syndrome compute units for processing of a second codeword received over the channel when the channel is characterized by a second bit error rate.
    Type: Application
    Filed: September 5, 2023
    Publication date: December 21, 2023
    Applicant: Maxlinear, Inc.
    Inventors: Youzhe Fan, Jining Duan
  • Publication number: 20230370192
    Abstract: receiver may include a first filter configured to generate a first estimation of a symbol of a received signal and a second filter configured to generate a second estimation of the symbol of the received signal. The receiver may also include a decoder configured to decode the symbol using one of the first estimation and the second estimation and a decision circuit configured to select one of the first estimation and the second estimation to provide to the decoder for decoding of the symbol based on a comparison of the first estimation to an estimation threshold.
    Type: Application
    Filed: July 18, 2023
    Publication date: November 16, 2023
    Applicant: MAXLINEAR, INC.
    Inventor: YouZhe FAN
  • Patent number: 11750223
    Abstract: A system comprises a forward error correction decoder comprising syndrome computation circuitry, key-equation solver circuitry, and search and evaluator circuitry. The syndrome computation circuitry may comprise a plurality of syndrome compute units connected in parallel. The syndrome computation circuitry may be dynamically configurable to vary a quantity of the syndrome compute units used for processing of a codeword based on conditions of a channel over which the codeword was received. The syndrome computation circuitry may be operable to use a first quantity of the syndrome compute units for processing of a first codeword received over the channel when the channel is characterized by a first bit error rate and a second quantity of the syndrome compute units for processing of a second codeword received over the channel when the channel is characterized by a second bit error rate.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: September 5, 2023
    Assignee: MaxLinear, Inc.
    Inventors: Youzhe Fan, Jining Duan
  • Patent number: 11705988
    Abstract: A receiver may include a first filter configured to generate a first estimation of a symbol of a received signal and a second filter configured to generate a second estimation of the symbol of the received signal. The receiver may also include a decoder configured to decode the symbol using one of the first estimation and the second estimation and a decision circuit configured to select one of the first estimation and the second estimation to provide to the decoder for decoding of the symbol based on a comparison of the first estimation to an estimation threshold.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: July 18, 2023
    Assignee: MaxLinear, Inc.
    Inventor: YouZhe Fan
  • Publication number: 20220109523
    Abstract: A receiver may include a first filter configured to generate a first estimation of a symbol of a received signal and a second filter configured to generate a second estimation of the symbol of the received signal. The receiver may also include a decoder configured to decode the symbol using one of the first estimation and the second estimation and a decision circuit configured to select one of the first estimation and the second estimation to provide to the decoder for decoding of the symbol based on a comparison of the first estimation to an estimation threshold.
    Type: Application
    Filed: December 14, 2021
    Publication date: April 7, 2022
    Inventor: YouZhe FAN
  • Patent number: 11201693
    Abstract: A receiver may include a first filter configured to generate a first estimation of a symbol of a received signal and a second filter configured to generate a second estimation of the symbol of the received signal. The receiver may also include a decoder configured to decode the symbol using one of the first estimation and the second estimation and a decision circuitconfigured to select one of the first estimation and the second estimation to provide to the decoder for decoding of the symbol based on a comparison of the first estimation to an estimation threshold.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: December 14, 2021
    Assignee: MaxLinear, Inc.
    Inventor: YouZhe Fan
  • Publication number: 20210336718
    Abstract: receiver may include a first filter configured to generate a first estimation of a symbol of a received signal and a second filter configured to generate a second estimation of the symbol of the received signal. The receiver may also include a decoder configured to decode the symbol using one of the first estimation and the second estimation and a decision circuit configured to select one of the first estimation and the second estimation to provide to the decoder for decoding of the symbol based on a comparison of the first estimation to an estimation threshold.
    Type: Application
    Filed: April 28, 2020
    Publication date: October 28, 2021
    Inventor: YouZhe FAN
  • Publication number: 20190305800
    Abstract: A system comprises a forward error correction decoder comprising syndrome computation circuitry, key-equation solver circuitry, and search and evaluator circuitry. The syndrome computation circuitry may comprise a plurality of syndrome compute units connected in parallel. The syndrome computation circuitry may be dynamically configurable to vary a quantity of the syndrome compute units used for processing of a codeword based on conditions of a channel over which the codeword was received. The syndrome computation circuitry may be operable to use a first quantity of the syndrome compute units for processing of a first codeword received over the channel when the channel is characterized by a first bit error rate and a second quantity of the syndrome compute units for processing of a second codeword received over the channel when the channel is characterized by a second bit error rate.
    Type: Application
    Filed: March 28, 2019
    Publication date: October 3, 2019
    Inventors: Youzhe Fan, Jining Duan