Patents by Inventor Youzi Hino

Youzi Hino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bias voltage compensated integrated circuit digital-to-analog converter
    Patent number: 4713649
    Abstract: A digital-to-analog converter comprising a ladder circuit resistance network and switching means comprising p-channel and n-channel MOS transistors. The distortion of analog signals generated by non-linear characteristics of resistors fabricated using p-channel or n-channel materials in the semiconductor are improved by replacing an inverter element module of the ladder circuit with T-type inverter circuit element module, and adjusting the resistance value of both the side branches of the T-type circuit.
    Type: Grant
    Filed: April 2, 1986
    Date of Patent: December 15, 1987
    Assignee: Fujitsu Limited
    Inventor: Youzi Hino
  • Resistance ladder network
    Patent number: 4703302
    Abstract: A plurality of resistors connected in a ladder format and disposed in parallel with each other. Each of the resistors has a resistance part and two mutual connection ends connected to the resistance part. The mutual connection ends are gathered at one side with respect to the resistance part.
    Type: Grant
    Filed: September 20, 1984
    Date of Patent: October 27, 1987
    Assignee: Fujitsu Limited
    Inventors: Youzi Hino, Hironobu Ogawa