Patents by Inventor Youzou Nakayasu
Youzou Nakayasu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9711105Abstract: A gate signal line driving circuit which suppresses noises in a gate signal and a display device which uses the gate signal line driving circuit are provided. A first basic circuit provided to a gate signal line driving circuit includes a HIGH voltage applying switching element which applies a HIGH voltage to gate signal lines in response to a signal HIGH period, and a LOW voltage applying switching circuit which applies a LOW voltage to the gate signal lines in response to a signal LOW period. In response to a signal HIGH period, a switch of the LOW voltage applying switching circuit of the first basic circuit is turned off based on a signal applied to a switch of the HIGH voltage applying switching element of a second basic circuit which assumes a signal HIGH period earlier than the first basic circuit.Type: GrantFiled: September 5, 2014Date of Patent: July 18, 2017Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co. Ltd.Inventors: Takahiro Ochiai, Mitsuru Goto, Youzou Nakayasu, Yuki Okada, Naoki Takada
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Patent number: 9070335Abstract: A display device includes an insulating substrate; a first conductive layer in which a first signal line and a second signal line are formed on the insulating substrate; an insulating layer provided in an upper layer of the first conductive layer; and a semiconductor layer, which is provided in an upper layer of the insulating layer, and in which a semiconductor film, which overlaps the first signal line and the second signal line in plan view, is formed.Type: GrantFiled: November 15, 2011Date of Patent: June 30, 2015Assignee: JAPAN DISPLAY INC.Inventor: Youzou Nakayasu
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Patent number: 9035864Abstract: A gate signal line drive circuit and a display device which realize the suppression of a threshold voltage of an element which is used for a long time are provided. With respect to elements to which a HIGH voltage is applied for a long time, a plurality of elements are connected parallel to each other and are controlled such that at least any one of the plurality of elements is driven by a switching element, and a period during which the element is not driven is set longer than a frame display period.Type: GrantFiled: July 7, 2010Date of Patent: May 19, 2015Assignees: JAPAN DISPLAY INC., PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.Inventors: Takahiro Ochiai, Mitsuru Goto, Youzou Nakayasu, Yuki Okada, Naoki Takada
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Patent number: 8947416Abstract: There is provided a display device that suppresses an electrostatic discharge failure in a manufacturing stage, and improves a yield. A substrate provided in the display device includes: a display unit in which a plurality of pixel circuits, and a common electrode are formed; N (integer satisfying N?3) gate signal lines extending in the display unit; a gate driver circuit in which N shift register circuits connected to the respective gate signal lines to supply a gate signal are arranged outside of the display unit side by side; a common voltage main line arranged further outside of the gate driver circuit with respect to the display unit; and M common voltage sub-lines extending in M (1?M<N?1) spacings among (N?1) spacings between the respective N shift register circuits which are arranged side by side, from the common voltage main lines to the common electrode.Type: GrantFiled: December 7, 2012Date of Patent: February 3, 2015Assignee: Japan Display Inc.Inventors: Takahiro Ochiai, Mitsuru Goto, Youzou Nakayasu, Masaki Nishikawa, Motoharu Miyamoto
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Publication number: 20140375615Abstract: A gate signal line driving circuit which suppresses noises in a gate signal and a display device which uses the gate signal line driving circuit are provided. A first basic circuit provided to a gate signal line driving circuit includes a HIGH voltage applying switching element which applies a HIGH voltage to gate signal lines in response to a signal HIGH period, and a LOW voltage applying switching circuit which applies a LOW voltage to the gate signal lines in response to a signal LOW period. In response to a signal HIGH period, a switch of the LOW voltage applying switching circuit of the first basic circuit is turned off based on a signal applied to a switch of the HIGH voltage applying switching element of a second basic circuit which assumes a signal HIGH period earlier than the first basic circuit.Type: ApplicationFiled: September 5, 2014Publication date: December 25, 2014Inventors: Takahiro OCHIAI, Mitsuru GOTO, Youzou NAKAYASU, Yuki OKADA, Naoki TAKADA
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Patent number: 8854291Abstract: A gate signal line driving circuit which suppresses noises in a gate signal and a display device which uses the gate signal line driving circuit are provided. A first basic circuit provided to a gate signal line driving circuit includes a HIGH voltage applying switching element which applies a HIGH voltage to gate signal lines in response to a signal HIGH period, and a LOW voltage applying switching circuit which applies a LOW voltage to the gate signal lines in response to a signal LOW period. In response to a signal HIGH period, a switch of the LOW voltage applying switching circuit of the first basic circuit is turned off based on a signal applied to a switch of the HIGH voltage applying switching element of a second basic circuit which assumes a signal HIGH period earlier than the first basic circuit.Type: GrantFiled: May 24, 2010Date of Patent: October 7, 2014Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co. Ltd.Inventors: Takahiro Ochiai, Mitsuru Goto, Youzou Nakayasu, Yuki Okada, Naoki Takada
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Patent number: 8451260Abstract: Each shift register includes a first element controlled by a first potential node to supply a first driving voltage to an output terminal, a second element controlled by a second potential node to supply a second driving voltage lower than the first driving voltage to the output terminal, and a third element for controlling the first potential node and the second potential node so as to have opposite potential levels. Voltages are applied to the third element so that a state of A>B and A>C and a state of A<B and A<C, or a state of A>B and A<C and a state of A<B and A>C, or a state of A<B and A>C and a state of A>B and A<C are switched alternately (A: a gate terminal of the third element, B: a voltage applied to a first terminal thereof, C: a voltage applied to a second terminal thereof).Type: GrantFiled: June 24, 2010Date of Patent: May 28, 2013Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.Inventors: Yuki Okada, Mitsuru Goto, Takahiro Ochiai, Naoki Takada, Youzou Nakayasu
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Publication number: 20120119979Abstract: A display device includes an insulating substrate; a first conductive layer in which a first signal line and a second signal line are formed on the insulating substrate; an insulating layer provided in an upper layer of the first conductive layer; and a semiconductor layer, which is provided in an upper layer of the insulating layer, and in which a semiconductor film, which overlaps the first signal line and the second signal line in plan view, is formed.Type: ApplicationFiled: November 15, 2011Publication date: May 17, 2012Inventor: Youzou NAKAYASU
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Publication number: 20110007061Abstract: A gate signal line drive circuit and a display device which realize the suppression of a threshold voltage of an element which is used for a long time are provided. With respect to elements to which a HIGH voltage is applied for a long time, a plurality of elements are connected parallel to each other and are controlled such that at least any one of the plurality of elements is driven by a switching element, and a period during which the element is not driven is set longer than a frame display period.Type: ApplicationFiled: July 7, 2010Publication date: January 13, 2011Inventors: Takahiro OCHIAI, Mitsuru Goto, Youzou Nakayasu, Yuki Okada, Naoki Takada
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Publication number: 20100328281Abstract: Each shift register includes a first element controlled by a first potential node to supply a first driving voltage to an output terminal, a second element controlled by a second potential node to supply a second driving voltage lower than the first driving voltage to the output terminal, and a third element for controlling the first potential node and the second potential node so as to have opposite potential levels. Voltages are applied to the third element so that a state of A>B and A>C and a state of A<B and A<C, or a state of A>B and A<C and a state of A<B and A>C, or a state of A<B and A>C and a state of A>B and A<C are switched alternately (A: a gate terminal of the third element, B: a voltage applied to a first terminal thereof, C: a voltage applied to a second terminal thereof).Type: ApplicationFiled: June 24, 2010Publication date: December 30, 2010Inventors: Yuki OKADA, Mitsuru Goto, Takahiro Ochiai, Naoki Takada, Youzou Nakayasu
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Publication number: 20100302217Abstract: A gate signal line driving circuit which suppresses noises in a gate signal and a display device which uses the gate signal line driving circuit are provided. A first basic circuit provided to a gate signal line driving circuit includes a HIGH voltage applying switching element which applies a HIGH voltage to gate signal lines in response to a signal HIGH period, and a LOW voltage applying switching circuit which applies a LOW voltage to the gate signal lines in response to a signal LOW period. In response to a signal HIGH period, a switch of the LOW voltage applying switching circuit of the first basic circuit is turned off based on a signal applied to a switch of the HIGH voltage applying switching element of a second basic circuit which assumes a signal HIGH period earlier than the first basic circuit.Type: ApplicationFiled: May 24, 2010Publication date: December 2, 2010Inventors: Takahiro OCHIAI, Mitsuru Goto, Youzou Nakayasu, Yuki Okada, Naoki Takada
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Publication number: 20060250342Abstract: The present invention decreases the voltage dependency of a semiconductor resistance element used in a resistance voltage dividing circuit thus preventing the deterioration of display quality of a display image and, at the same time, realizing the reduction of power consumption. In a display device which includes a display element and a drive circuit which drives the display element, the drive circuit includes a semiconductor resistance element, the semiconductor resistance element includes a first conductive impurity region and a second conductive impurity region which is embedded in the first conductive impurity region and functions as a resistance element, the second conductive impurity region includes a first electrode and a second electrode, and a voltage which is applied to the first electrode or the second electrode of the second conductive impurity region is applied to the first conductive impurity region.Type: ApplicationFiled: March 31, 2006Publication date: November 9, 2006Inventors: Yoshihiro Kotani, Hidetoshi Kida, Kentaro Agata, Youzou Nakayasu, Hiroshi Watanabe
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Patent number: 7102609Abstract: The present invention realizes a liquid crystal display which mounts driving circuits of low power consumption on a substrate on which a display part is mounted. The driving circuits which supply gray scale voltages to pixels are mounted on a liquid crystal display panel. Display data is transferred between the driving circuits using wiring formed on the liquid crystal display panel, the display data is transferred in the inside of the driving circuits through inner data bus lines, and a data inversion calculation which inverts values of the display data is performed in the inside of the driving circuits for achieving the low power consumption.Type: GrantFiled: April 19, 2002Date of Patent: September 5, 2006Assignees: Hitachi, Ltd., Hitachi Device Engineering Co. Ltd.Inventors: Kazunari Saitou, Shigeru Itou, Yukihide Ode, Youzou Nakayasu, Shinji Yasukawa
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Publication number: 20050270009Abstract: In a liquid crystal display module which includes a first display panel and a second display panel, it is possible to reduce a voltage drop attributed to the line resistance of a drive voltage supplied to the second display panel without increasing the cost. For this purpose, the first display panel includes a power source circuit which generates a drive voltage, the second display panel includes a scanning line drive circuit which drives scanning lines of the second display panel, a power source line of the first display panel, a power source line to which the drive voltage generated by the power source circuit is supplied and a variable resistance circuit which is connected with the power source line. The scanning line drive circuit drives the scanning lines of the second display panel in response to a drive voltage outputted from the variable resistance circuit.Type: ApplicationFiled: June 8, 2005Publication date: December 8, 2005Inventors: Youichi Ohki, Youzou Nakayasu, Yuichi Numata, Mitsuru Goto, Yoshinori Aoki
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Publication number: 20020180684Abstract: The present invention realizes a liquid crystal display which mounts driving circuits of low power consumption on a substrate on which a display part is mounted. The driving circuits which supply gray scale voltages to pixels are mounted on a liquid crystal display panel. Display data is transferred between the driving circuits using wiring formed on the liquid crystal display panel, the display data is transferred in the inside of the driving circuits through inner data bus lines, and a data inversion calculation which inverts values of the display data is performed in the inside of the driving circuits for achieving the low power consumption.Type: ApplicationFiled: April 19, 2002Publication date: December 5, 2002Applicant: Hitachi, Ltd.Inventors: Kazunari Saitou, Shigeru Itou, Yukihide Ode, Youzou Nakayasu, Shinji Yasukawa