Abstract: The apparatus for osmotic power generation and desalination using a salinity difference includes: a first osmotic membrane reactor having a first salt water position space and a third salt water position space separated by a first forward osmotic membrane; a second osmotic membrane reactor having a second salt water position space and a draw solution position space separated by a second forward osmotic membrane; a high pressure pump connected between the second salt water position space and the third salt water position space; a desalination unit obtaining fresh water by separating a draw solute from a draw solution diluted through a transmission of water in salt water of the second salt water position space by way of the draw solution position space; and a turbine driven by flow force of salt water discharged from the third salt water position space to produce electric energy.

Abstract: An apparatus for osmotic power generation and desalination of seawater using a salinity difference is provided.

Abstract: Disclosed herein are a valve and a micro fluid pump having the same. The valve is mounted in a micro fluid pump having a capillary tube, to which a gas supply unit and a fluid transfer pipe are connected, for controlling the introduction and the discharge of fluid. The valve includes a discharge pipe filled with liquid such that the discharge pipe has a predetermined resistance pressure and constructed in a structure in which one end of the discharge pipe is connected to the capillary tube such that the discharge pipe communicates with the interior of the capillary tube, and the other end of the discharge pipe is open, thereby allowing gas out of the capillary tube through the discharge pipe when a gas pressure in the capillary tube exceeds the resistance pressure of the discharge pipe.

Abstract: An erythrocyte sedimentation rate log capable of quickly and easily measuring an erythrocyte sedimentation rate in the blood by measuring the number of erythrocytes in the blood passing through a branched channel from a small amount of blood in an electrical manner without an additional driving means is disclosed. The erythrocyte sedimentation rate log includes a main body formed of an upper plate and a lower plate, a blood introduction part formed in the main body to include an inlet and an outlet formed at one side of the upper plate of the main body, a channel disposed at one side of the blood introduction part to communicate with the blood introduction part such that erythrocytes in blood pass through the channel, and a current supply part installed in the channel to supply constant current to cause an electrical resistance in erythrocytes.

Abstract: Disclosed herein are a valve and a micro fluid pump having the same. The valve is mounted in a micro fluid pump having a capillary tube, to which a gas supply unit and a fluid transfer pipe are connected, for controlling the introduction and the discharge of fluid. The valve includes a discharge pipe filled with liquid such that the discharge pipe has a predetermined resistance pressure and constructed in a structure in which one end of the discharge pipe is connected to the capillary tube such that the discharge pipe communicates with the interior of the capillary tube, and the other end of the discharge pipe is open, thereby allowing gas out of the capillary tube through the discharge pipe when a gas pressure in the capillary tube exceeds the resistance pressure of the discharge pipe.

Abstract: Disclosed is a portable micro blood separator, which has a blood separator including a main body including an upper substrate and a lower substrate; a blood introduction unit formed at one side of the main body for allowing blood to be introduced into the separator; a blood inflow unit including an inflow groove formed in the lower substrate, through which the blood introduced by the blood introduction unit flows; and a plasma extraction unit including extraction spaces extended from the blood inflow unit and having a height lower than that of the inflow groove of the blood inflow unit so that plasma can be separated from the blood flowing into the blood inflow unit, so as to separate the plasma and corpuscles from the blood and analyze ingredients in the separated plasma.

Abstract: The present invention relates to a method for forming a storage node contact of a semiconductor device. The method includes the steps of: depositing sequentially a conductive layer, a nitride layer and a polysilicon layer on a substrate having an insulating structure and a conductive structure; etching selectively the polysilicon layer, the nitride layer and the conductive layer to form a plurality of conductive patterns with a stack structure of the conductive layer and a dual hard mask including the polysilicon layer and the nitride layer; forming an insulation layer along a profile containing the conductive patterns; and etching the insulation layer by using a line type photoresist pattern as an etch mask to form a contact hole exposing the conductive structure disposed between the neighboring conductive patterns.

Abstract: The present invention discloses methods for manufacturing a metal line of a semiconductor device that can prevent undesirable etching of an edge of an interlayer insulating film. In accordance with the method, a lower metal line exposed by a via contact hole is covered by a photoresist film pattern which is formed via an exposure and development process using an upper metal line mask. An etching process is performed using the photoresist film pattern as a mask to form the upper metal line region that is then filled to form an upper metal line after removing the photoresist film pattern.

Abstract: The present invention relates to a method for forming a storage node contact plug of a semiconductor device. The method includes the steps of: forming a bit line structure including a bit line and a hard mask on a substrate; forming a spacer made of an oxide material at sidewalls of the bit line structure; forming a line type photoresist pattern arranged in a direction vertical to the bit line structure on a storage node contact area of the substrate; forming an inter-layer insulation layer on an entire surface of the resulting structure including the line type photoresist pattern such that the inter-layer insulation layer is filled into a space between the photoresist pattern; etching an upper portion of the inter-layer insulation layer to expose the photoresist pattern; and removing the exposed photoresist pattern to open the storage node contact area.

Abstract: The present invention discloses methods for manufacturing metal line of semiconductor device that can prevent undesirable etching of an edge of an interlayer insulating film. In accordance with the method, a lower metal line exposed by a via contact hole is covered by a photoresist film pattern which is formed via an exposure and development process using an upper metal line mask. An etching process is performed using the photoresist film pattern as a mask to form the upper metal line region that is then filled to form an upper metal line after removing the photoresist film pattern.

Abstract: The present invention relates to a method for forming a storage node contact of a semiconductor device. The method includes the steps of: depositing sequentially a conductive layer, a nitride layer and a polysilicon layer on a substrate having an insulating structure and a conductive structure; etching selectively the polysilicon layer, the nitride layer and the conductive layer to form a plurality of conductive patterns with a stack structure of the conductive layer and a dual hard mask including the polysilicon layer and the nitride layer; forming an insulation layer along a profile containing the conductive patterns; and etching the insulation layer by using a line type photoresist pattern as an etch mask to form a contact hole exposing the conductive structure disposed between the neighboring conductive patterns.

Abstract: The present invention discloses a method for fabricating a semiconductor device. In a process for forming metal interconnection contact holes on both a gate electrode including an Si-rich SiON film as a mask insulating film in a peripheral circuit region and on a semiconductor substrate, the metal interconnection contact hole is formed according to a three-step etching process using a photoresist film pattern exposing the intended locations of a metal interconnection contacts as an etching mask. Accordingly, contact properties are improved by preventing damage to the semiconductor substrate, thereby reducing leakage current and improving yield.

Abstract: The present invention provides a method for forming a storage electrode on a semiconductor substrate, and in particular to a storage electrode formation method which can prevent formation of a sharp upper edged cylindrical storage electrode, thereby improving a dielectric property and reliability of a capacitor.

Abstract: The present invention discloses a method for fabricating a semiconductor device. In particular, methods of the present invention produces a contact plug which is larger than the presumed contact region. As a result, the acceptable process error margin for misalignment is increased, and the property and the yield of semiconductor devices are improved.

Abstract: The present invention discloses a method for fabricating a semiconductor device. In a process for forming a contact plug, a pad polycrystalline silicon layer pattern is formed at the presumed contact region, and a contact plug is formed according to a selective epitaxial growth (SEG) method using the pad polycrystalline silicon layer pattern as a seed. Accordingly, a higher contact plug is formed by improving a growth rate of the SEG process, and thus a succeeding process can be easily performed. In the SEG process, a contact property is improved by compensating for a semiconductor substrate damaged in a process for forming an insulating film spacer at the sidewalls of a gate electrode. As a result, the property and yield of the semiconductor device are remarkably improved.

Abstract: Disclosed is a composition for use in dermal application. The composition includes microbeads or chemically stable particles having an internal structure of pores. A chemical compound having a pharmaceutical or cosmetic activity is retained in the internal structure of the porous particles. Each of the particles is coated with at least one of a silicone and a polysiloxane-based compound. Also disclosed is a method of making a composition. A plurality of particles containing a chemical compound in its internal structure is prepared. A coating mixture including at least one of a silicone and a polysiloxane-based compound with a solvent is also prepared. The particles are mixed with the coating mixture, which coats over the particles. The coated particles are subject to drying to evaporate the solvent from the coating mixture.

Abstract: The present invention provides a method for forming a storage electrode on a semiconductor substrate, and in particular to a storage electrode formation method which can prevent formation of a sharp upper edged cylindrical storage electrode, thereby improving a dielectric property and reliability of a capacitor.

Abstract: The present invention discloses a method for fabricating a semiconductor device. In particular, methods of the present invention produces a contact plug which is larger than the presumed contact region. As a result, the acceptable process error margin for misalignment is increased, and the property and the yield of semiconductor devices are improved.

Abstract: The present invention discloses a method for fabricating a semiconductor device. In a process for forming metal interconnection contact holes on both a gate electrode including an Si-rich SiON film as a mask insulating film in a peripheral circuit region and on a semiconductor substrate, the metal interconnection contact hole is formed according to a three-step etching process using a photoresist film pattern exposing the intended locations of a metal interconnection contacts as an etching mask. Accordingly, contact properties are improved by preventing damage to the semiconductor substrate, thereby reducing leakage current and improving yield.

Abstract: The present invention discloses a method for fabricating a semiconductor device. In a process for forming a contact plug, a pad polycrystalline silicon layer pattern is formed at the presumed contact region, and a contact plug is formed according to a selective epitaxial growth (SEG) method using the pad polycrystalline silicon layer pattern as a seed. Accordingly, a higher contact plug is formed by improving a growth rate of the SEG process, and thus a succeeding process can be easily performed. In the SEG process, a contact property is improved by compensating for a semiconductor substrate damaged in a process for forming an insulating film spacer at the sidewalls of a gate electrode. As a result, the property and yield of the semiconductor device are remarkably improved.