Patents by Inventor Yu-Che Huang
Yu-Che Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240143529Abstract: A method for a host computer to access a target device via a remote extender. The target device is connected to the remote extender, and a target device driver corresponding to the target device is installed on the host computer. The method includes setting up a logic transmission pipe between the host computer and the remote extender with a network connection as the underlying transmission path, and handling an I/O request from the target device driver to access the target device via the logic transmission pipe. The method is used to allow the target device to be treated by the host computer as a local resource. Additionally, the disclosure provides a system for accessing the remote target device and a remote extender thereof.Type: ApplicationFiled: March 9, 2023Publication date: May 2, 2024Inventors: YU-HAN LIU, SHENG-CHE CHUEH, CHONG-LI HUANG
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Patent number: 11973054Abstract: A method for transferring an electronic device includes steps as follows. A flexible carrier is provided and has a surface with a plurality of electronic devices disposed thereon. A target substrate is provided corresponding to the surface of the flexible carrier. A pin is provided, and a pin end thereof presses on another surface of the flexible carrier without the electronic devices disposed thereon, so that the flexible carrier is deformed, causing at least one of the electronic devices to move toward the target substrate and to be in contact with the target substrate. A beam is provided to transmit at least a portion of the pin and emitted from the pin end to melt a solder. The electronic device is fixed on the target substrate by soldering. The pin is moved to restore the flexible carrier to its original shape, allowing the electronic device fixed by soldering to separate from the carrier.Type: GrantFiled: January 18, 2022Date of Patent: April 30, 2024Assignee: Stroke Precision Advanced Engineering Co., Ltd.Inventors: Yu-Min Huang, Sheng Che Huang, Chingju Lin, Wei-Hao Wang
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Publication number: 20240081077Abstract: A transistor includes a first semiconductor layer, a second semiconductor layer, a semiconductor nanosheet, a gate electrode and source and drain electrodes. The semiconductor nanosheet is physically connected to the first semiconductor layer and the second semiconductor layer. The gate electrode wraps around the semiconductor nanosheet. The source and drain electrodes are disposed at opposite sides of the gate electrode. The first semiconductor layer surrounds the source electrode, the second semiconductor layer surrounds the drain electrode, and the semiconductor nanosheet is disposed between the source and drain electrodes.Type: ApplicationFiled: September 1, 2022Publication date: March 7, 2024Applicants: Taiwan Semiconductor Manufacturing Company, Ltd., National Yang Ming Chiao Tung UniversityInventors: Po-Tsun Liu, Meng-Han Lin, Zhen-Hao Li, Tsung-Che Chiang, Bo-Feng Young, Hsin-Yi Huang, Sai-Hooi Yeong, Yu-Ming Lin
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Patent number: 11817397Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a carrier, a sensor module, a connector, and a stress buffer structure. The sensor module is disposed on the carrier. The connector is connected to the carrier. The stress buffer structure connects the connector to the sensor module.Type: GrantFiled: December 21, 2020Date of Patent: November 14, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chi Sheng Tseng, Lu-Ming Lai, Hui-Chung Liu, Yu-Che Huang
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Publication number: 20230327007Abstract: A method includes forming a 2-D material layer over a substrate, wherein the 2-D material layer comprises transition metal atoms and chalcogen atoms; forming a gate structure over the 2-D material layer; supplying chemical molecules to the 2-D material layer, such that atoms of the chemical molecules react with portions of the chalcogen atoms to weaken covalent bonds between the portions of the chalcogen atoms and the transition metal atoms; and forming source/drain contacts over the 2-D material layer, wherein contact metal atoms of the source/drain contacts form metallic bonds with the transition metal atoms of the 2-D material layer.Type: ApplicationFiled: June 13, 2023Publication date: October 12, 2023Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., National Yang Ming Chiao Tung UniversityInventors: Shu-Jui CHANG, Shin-Yuan WANG, Yu-Che HUANG, Chun-Liang LIN, Chao-Hsin CHIEN, Chenming HU
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Publication number: 20230063405Abstract: The present disclosure provides an optical module. The optical module includes an optical component disposed in or on a carrier and configured to receive a first light. The optical component is further configured to transmit a second light to a first portion of the carrier and transmit a third light to a second portion of the carrier.Type: ApplicationFiled: September 2, 2021Publication date: March 2, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Shih-Chieh TANG, Lu-Ming LAI, Yu-Che HUANG, Ying-Chung CHEN
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Patent number: 11562969Abstract: A semiconductor device package and a method for packaging the same are provided. A semiconductor device package includes a carrier, an electronic component, a buffer layer, a reinforced structure, and an encapsulant. The electronic component is disposed over the carrier and has an active area. The buffer layer is disposed on the active area of the electronic component. The reinforced structure is disposed on the buffer layer. The encapsulant encapsulates the carrier, the electronic component and the reinforced structure.Type: GrantFiled: September 12, 2019Date of Patent: January 24, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Yu-Che Huang, Lu-Ming Lai
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Publication number: 20220416111Abstract: An optical device includes a substrate, an electronic component and a lid. The electronic component is disposed on the substrate. The lid is disposed on the substrate. The lid has a first cavity over the electronic component and a second cavity over the first cavity. The sidewall of the second cavity is inclined.Type: ApplicationFiled: August 30, 2022Publication date: December 29, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chang Chin TSAI, Yu-Che HUANG, Hsun-Wei CHAN
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Patent number: 11495511Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a semiconductor package device, a first constraint structure and a second constraint structure. The first constraint structure is connected to the semiconductor package device. The second constraint structure is connected to the semiconductor package device and under a projection of the semiconductor package device.Type: GrantFiled: August 28, 2020Date of Patent: November 8, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Yu-Che Huang, Lu-Ming Lai, Ying-Chung Chen
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Patent number: 11440215Abstract: A method of making a wooden board assembly includes A) determining a scrap portion of a trunk; B) cutting the trunk horizontally to form multiple boards; C) removing narrow scraps and trimmed sections of each of the multiple boards to obtain multiple trimmed wide boards, and cutting narrow board areas from the scrap portion to form multiple peripheral boards; D) removing a part of the scrap portion and two trimmed sections from each of the multiple peripheral boards; E) connecting the multiple trimmed wide boards and the multiple peripheral boards to form a substrate; F) adhering two straps on the substrate to produce a wood pattern assembly; G) cutting the wood pattern assembly to form multiple cut films; H) adhering one of the multiple cut films with a nonwoven fabric with a transparent adhesive and connecting the multiple cut films on a fixing lamination; and I) cutting the fixing lamination.Type: GrantFiled: March 5, 2021Date of Patent: September 13, 2022Assignee: Juan Wood Building Materials Co., Ltd.Inventor: Yu-Che Huang
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Publication number: 20220281132Abstract: A method of making a wooden board assembly includes A) determining a scrap portion of a trunk; B) cutting the trunk horizontally to form multiple boards; C) removing narrow scraps and trimmed sections of each of the multiple boards to obtain multiple trimmed wide boards, and cutting narrow board areas from the scrap portion to form multiple peripheral boards; D) removing a part of the scrap portion and two trimmed sections from each of the multiple peripheral boards; E) connecting the multiple trimmed wide boards and the multiple peripheral boards to form a substrate; F) adhering two straps on the substrate to produce a wood pattern assembly; G) cutting the wood pattern assembly to form multiple cut films; H) adhering one of the multiple cut films with a nonwoven fabric with a transparent adhesive and connecting the multiple cut films on a fixing lamination; and I) cutting the fixing lamination.Type: ApplicationFiled: March 5, 2021Publication date: September 8, 2022Inventor: Yu-Che Huang
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Patent number: 11430906Abstract: An optical device includes a substrate, an electronic component and a lid. The electronic component is disposed on the substrate. The lid is disposed on the substrate. The lid has a first cavity over the electronic component and a second cavity over the first cavity. The sidewall of the second cavity is inclined.Type: GrantFiled: July 22, 2019Date of Patent: August 30, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chang Chin Tsai, Yu-Che Huang, Hsun-Wei Chan
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Patent number: 11410915Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a carrier, a first encapsulant, and an interposer. The first encapsulant is on the carrier and defines a cavity. The interposer is disposed between the first encapsulant and the cavity. The first encapsulant covers a portion of the interposer.Type: GrantFiled: November 3, 2020Date of Patent: August 9, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Yu-Che Huang, Chang Chin Tsai
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Publication number: 20220199550Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a carrier, a sensor module, a connector, and a stress buffer structure. The sensor module is disposed on the carrier. The connector is connected to the carrier. The stress buffer structure connects the connector to the sensor module.Type: ApplicationFiled: December 21, 2020Publication date: June 23, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi Sheng TSENG, Lu-Ming LAI, Hui-Chung LIU, Yu-Che HUANG
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Publication number: 20220139812Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a carrier, a first encapsulant, and an interposer. The first encapsulant is on the carrier and defines a cavity. The interposer is disposed between the first encapsulant and the cavity. The first encapsulant covers a portion of the interposer.Type: ApplicationFiled: November 3, 2020Publication date: May 5, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yu-Che HUANG, Chang Chin TSAI
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Publication number: 20220068747Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a semiconductor package device, a first constraint structure and a second constraint structure. The first constraint structure is connected to the semiconductor package device. The second constraint structure is connected to the semiconductor package device and under a projection of the semiconductor package device.Type: ApplicationFiled: August 28, 2020Publication date: March 3, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yu-Che HUANG, Lu-Ming LAI, Ying-Chung CHEN
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Publication number: 20210398266Abstract: An object appearance detection system with posture detection and a control method thereof are provided. A controlling and computing device uses a first sensor and a second sensor to control a conveying production line, and controls a robotic arm to move an object to be detected to a posture detection position and a surface detection position. When the object to be detected is in the posture detection position, the controlling and computing device receives a posture detection image to perform posture detection on the object to be detected. When the object to be detected is in the surface detection position, the controlling and computing device controls the robotic arm to adjust the posture of the object to be detected according to the posture detection result and receives images from a remote imaging device and photographing devices to perform surface defect detection on the object to be detected.Type: ApplicationFiled: June 20, 2020Publication date: December 23, 2021Inventors: Hsien-I LIN, Yu-Che HUANG, FAUZY SATRIO WIBOWO, YUDA RISMA WAHYUDI
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Patent number: 11205261Abstract: An object appearance detection system with posture detection and a control method thereof are provided. A controlling and computing device uses a first sensor and a second sensor to control a conveying production line, and controls a robotic arm to move an object to be detected to a posture detection position and a surface detection position. When the object to be detected is in the posture detection position, the controlling and computing device receives a posture detection image to perform posture detection on the object to be detected. When the object to be detected is in the surface detection position, the controlling and computing device controls the robotic arm to adjust the posture of the object to be detected according to the posture detection result and receives images from a remote imaging device and photographing devices to perform surface defect detection on the object to be detected.Type: GrantFiled: June 20, 2020Date of Patent: December 21, 2021Assignee: NATIONAL TAIPEI UNIVERSITY OF TECHNOLOGYInventors: Hsien-I Lin, Yu-Che Huang, Fauzy Satrio Wibowo, Yuda Risma Wahyudi
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Publication number: 20210358823Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a semiconductor package structure includes a semiconductor die and a light absorbing layer. The semiconductor die has a first surface, a second surface and a third surface. An active layer of the semiconductor die is adjacent to the first surface. The second surface is opposite to the first surface. The third surface extends from the first surface to the second surface. The light absorbing layer covers the second surface and the third surface of the semiconductor die. The semiconductor die has a thickness defined from the first surface to the second surface, and the thickness of the semiconductor die is less than or equal to about 300 micrometers (?m).Type: ApplicationFiled: May 18, 2020Publication date: November 18, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi Sheng TSENG, Lu-Ming LAI, Yu-Che HUANG, Shih-Chieh TANG, Yu-Min PENG, Hui-Chung LIU
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Patent number: 11133278Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a semiconductor die, a cap layer, a conductive terminal, and a dam structure. The semiconductor die has a first surface. The cap layer is over the semiconductor die and has a second surface facing the first surface of the semiconductor die. The conductive terminal penetrates the cap layer and electrically connects to the semiconductor die. The dam structure is between the semiconductor die and the cap layer and surrounds a portion of the conductive terminal between the first surface and the second surface, thereby forming a gap between the cap layer and the semiconductor die.Type: GrantFiled: September 25, 2019Date of Patent: September 28, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Yu-Che Huang, Ching-Han Huang, An-Nong Wen, Po-Ming Huang