Abstract: A semiconductor structure includes a dielectric layer over a substrate, a via conductor over the substrate and in the dielectric layer, and a first graphene layer disposed over the via conductor. In some embodiments, a top surface of the via conductor and a top surface of the dielectric layer are level. In some embodiments, the first graphene layer overlaps the via conductor from a top view. In some embodiments, the semiconductor structure further includes a second graphene layer under the via conductor and a third graphene layer between the dielectric layer and the via conductor. In some embodiments, the second graphene layer is between the substrate and the via conductor.

Abstract: A method of forming a polysilicon spacer with a vertical profile. A dielectric layer and a sacrificial layer are successively deposited to cover the entire surface of a polysilicon layer that covers an insulating structure. Then, CMP is used to remove parts of the sacrificial layer, the dielectric layer and the polysilicon layer to reach a planarized surface. Then, a part of the polysilicon layer outside the insulating structure is removed to make the insulating structures protrude from the top of the polysilicon layer. After removing the sacrificial layer, forming a second oxide layer on the exposed surface of the polysilicon layer and removing the dielectric layer, dry etching is used to remove the polysilicon layer that is not covered by the second oxide layer. The polysilicon layer left under the second oxide layer serves as a polysilicon spacer with a vertical profile.