Patents by Inventor Yu-Chen Kuo
Yu-Chen Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240361819Abstract: A circuit includes a power detector and a logic circuit. The power detector is configured to output a first power management signal according to a first power supply signal from a first power supply and a status signal. The circuit is configured to operate in different modes in response to the status signal. The logic circuit is configured to output a second power management signal, according to the first power management signal and the status signal.Type: ApplicationFiled: July 5, 2024Publication date: October 31, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Chen KUO, Yangsyu LIN, Yu-Hao HSU, Cheng Hung LEE, Hung-Jen LIAO
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Patent number: 12132144Abstract: A manufacturing method of an electronic element module is provided. The method includes: disposing a plurality of first micro-light-emitting diodes on a first temporary substrate; and replacing at least one defective micro-light-emitting diode of the first micro-light-emitting diodes with at least one second micro-light-emitting diode. The first micro-light-emitting diodes and at least one second micro-light-emitting diode are distributed on the first temporary substrate. The first micro-light-emitting diodes and at least one second micro-light-emitting diode have same properties, and at least one of the appearance difference, the height difference and the orientation difference exists between the first micro-light-emitting diodes and at least one second micro-light-emitting diode. A semiconductor structure and a display panel are also provided.Type: GrantFiled: December 4, 2023Date of Patent: October 29, 2024Assignee: PlayNitride Display Co., Ltd.Inventors: Bo-Wei Wu, Yu-Yun Lo, Chien-Chen Kuo, Chang-Feng Tsai, Tzu-Yang Lin
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Patent number: 12113055Abstract: A method comprises depositing a protection layer over a first substrate, wherein the first substrate is part of a first semiconductor die, forming an under bump metallization structure over the protection layer, forming a connector over the under bump metallization structure, forming a first dummy plane along a first edge of a top surface of the first semiconductor die and forming a second dummy plane along a second edge of the top surface of the first semiconductor die, wherein the first dummy plane and the second dummy plane form an L-shaped region.Type: GrantFiled: June 22, 2020Date of Patent: October 8, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yao-Chun Chuang, Yu-Chen Hsu, Hao Chun Liu, Chita Chuang, Chen-Cheng Kuo, Chen-Shien Chen
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Publication number: 20240313157Abstract: A light-emitting diode includes a semiconductor epitaxial structure that has a first surface and a second surface opposite to each other, and that includes a first semiconductor layer, a second semiconductor layer, an active layer, and a third semiconductor layer disposed in such order in a direction from the first surface to the second surface. The first semiconductor layer includes a first sublayer and a second sublayer. A surface of the first sublayer away from the second sublayer is the first surface. The first surface has a roughened surface. The second sublayer is closer to the second surface than the first sublayer. Each of the first sublayer and the second sublayer includes an aluminum-containing compound semiconductor material. An aluminum content of the first sublayer is smaller than that of the second sublayer. A method for manufacturing the light-emitting diode is also provided.Type: ApplicationFiled: May 21, 2024Publication date: September 19, 2024Inventors: Yenchin WANG, Jinghua CHEN, Huan Shao KUO, Yu-Ren PENG, Shaohua HUANG
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Patent number: 12094765Abstract: In an embodiment, a method includes: dispensing a first dielectric layer around and on a first metallization pattern, the first dielectric layer including a photoinsensitive molding compound; planarizing the first dielectric layer such that surfaces of the first dielectric layer and the first metallization pattern are planar; forming a second metallization pattern on the first dielectric layer and the first metallization pattern; dispensing a second dielectric layer around the second metallization pattern and on the first dielectric layer, the second dielectric layer including a photosensitive molding compound; patterning the second dielectric layer with openings exposing portions of the second metallization pattern; and forming a third metallization pattern on the second dielectric layer and in the openings extending through the second dielectric layer, the third metallization pattern coupled to the portions of the second metallization pattern exposed by the openings.Type: GrantFiled: January 17, 2022Date of Patent: September 17, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ting-Chen Tseng, Sih-Hao Liao, Po-Han Wang, Yu-Hsiang Hu, Hung-Jui Kuo
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Publication number: 20240297053Abstract: A method includes attaching an integrated circuit die adjacent to a first substrate, the integrated circuit die comprising: an active device in a second substrate; a pad adjacent to the second substrate; and a first dielectric layer adjacent to the second substrate, the first dielectric layer comprising a polyimide with an ester group; forming an encapsulant around the integrated circuit die; and removing the first dielectric layer.Type: ApplicationFiled: May 6, 2024Publication date: September 5, 2024Inventors: Ting-Chen Tseng, Sih-Hao Liao, Yu-Hsiang Hu, Hung-Jui Kuo
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Patent number: 12072750Abstract: A circuit includes a power detector and a logic circuit. The power detector is configured to output a first power management signal according to a first power supply signal from a first power supply and a status signal. The circuit is configured to operate in different modes in response to the status signal. The logic circuit is configured to output a second power management signal, according to the first power management signal and the status signal.Type: GrantFiled: June 20, 2023Date of Patent: August 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Chen Kuo, Yangsyu Lin, Yu-Hao Hsu, Cheng Hung Lee, Hung-Jen Liao
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Patent number: 11863916Abstract: A color correction method is applied to an image correction apparatus having an image sensor, and includes searching a color deviation area within a detection image, analyzing the detection image to estimate a correction color value of the color deviation area, and calibrating the color deviation area by the correction color value to generate a calibrated detection image without color deviation.Type: GrantFiled: January 27, 2022Date of Patent: January 2, 2024Assignee: ALTEK SEMICONDUCTOR CORPORATIONInventors: Yu-Chen Kuo, Po-Han Tseng, Kuo-Ming Lai
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Publication number: 20230237626Abstract: An image calibration method applied to a wide-angle image and executed by an image calibration apparatus includes applying primary lens distortion correction for the wide-angle image to generate a corrected image, segmenting an foreground image from the corrected image to generate a background image, applying secondary distortion correction for the foreground image based on the pre-defined object to generate a calibrated foreground image, fusing the background image with the calibrated foreground image to generate a fused image, detecting at least one residual empty pixel not overlapped by the calibrated foreground image within the fused image, and utilizing a machine learning algorithm to fill the at least one residual empty pixel of the fused image by extending the background image to provide an output image. The foreground image contains feature pixels relate to a pre-defined object and the background image has empty pixels corresponding to the foreground image.Type: ApplicationFiled: January 27, 2022Publication date: July 27, 2023Applicant: ALTEK SEMICONDUCTOR CORPORATIONInventors: Yu-Chen Kuo, Yu-Ting Lin, Kuo-Chang Chen
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Publication number: 20230239444Abstract: A color correction method is applied to an image correction apparatus having an image sensor, and includes searching a color deviation area within a detection image, analyzing the detection image to estimate a correction color value of the color deviation area, and calibrating the color deviation area by the correction color value to generate a calibrated detection image without color deviation.Type: ApplicationFiled: January 27, 2022Publication date: July 27, 2023Applicant: ALTEK SEMICONDUCTOR CORPORATIONInventors: Yu-Chen Kuo, Po-Han Tseng, Kuo-Ming Lai
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Patent number: 11508877Abstract: A red light emitting diode including an epitaxial stacked layer, a first and a second electrodes and a first and a second electrode pads is provided. The epitaxial stacked layer includes a first-type and a second-type semiconductor layers and a light emitting layer. A main light emitting wavelength of the light emitting layer falls in a red light range. The epitaxial stacked layer has a first side adjacent to the first semiconductor layer and a second side adjacent to the second semiconductor layer. The first and the second electrodes are respectively electrically connected to the first-type and the second-type semiconductor layers, and respectively located to the first and the second sides. The first and a second electrode pads are respectively disposed on the first and the second electrodes and respectively electrically connected to the first and the second electrodes. The first and the second electrode pads are located at the first side of the epitaxial stacked layer.Type: GrantFiled: March 23, 2020Date of Patent: November 22, 2022Assignee: Genesis Photonics Inc.Inventors: Tung-Lin Chuang, Yi-Ru Huang, Yu-Chen Kuo, Chih-Ming Shen, Tsung-Syun Huang, Jing-En Huang
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Patent number: 11393955Abstract: A light emitting diode (LED) including an epitaxial stacked layer, first and second reflective layers which are disposed at two sides of the epitaxial stacked layer, a current conducting layer and first and second electrodes and a manufacturing thereof are provided. The epitaxial stacked layer includes a first-type and a second-type semiconductor layers and an active layer. A main light emitting surface with a light transmittance >0% and ?10% is formed on one of the two reflective layers. The current conducting layer contacts the second-type semiconductor layer. The first electrode is electrically connected to the first-type semiconductor layer. The second electrode is electrically connected to the second-type semiconductor layer via the current conducting layer. A contact scope of the current conducting layer and the second-type semiconductor layer is served as a light-emitting scope overlapping the two layers, but not overlapping the two electrodes.Type: GrantFiled: December 6, 2019Date of Patent: July 19, 2022Assignee: Genesis Photonics Inc.Inventors: Yi-Ru Huang, Kai-Shun Kang, Tung-Lin Chuang, Yu-Chen Kuo, Yan-Ting Lan, Chih-Ming Shen, Jing-En Huang
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Patent number: 11342488Abstract: A light emitting diode chip including an epitaxy stacked layer, first and second electrodes and a first reflective layer is provided. The epitaxy stacked layer includes first-type and second-type semiconductor layers and a light-emitting layer. The first and second electrodes are respectively electrically connected to the first-type and second-type semiconductor layers. An orthogonal projection of the light-emitting layer on the first-type semiconductor layer is misaligned with an orthogonal projection of the first electrode on the first-type semiconductor layer. The first reflective layer is disposed on the epitaxy stacked layer, the first and second electrodes. An orthogonal projection of the first reflective layer on the second-type semiconductor layer is misaligned with an orthogonal projection of the second electrode on the second-type semiconductor layer. Furthermore, a light emitting diode device is also provided.Type: GrantFiled: August 5, 2019Date of Patent: May 24, 2022Assignee: Genesis Photonics Inc.Inventors: Tung-Lin Chuang, Yi-Ru Huang, Yu-Chen Kuo, Yan-Ting Lan, Chih-Ming Shen, Jing-En Huang
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Patent number: 11322973Abstract: A power device and an operating method thereof are provided. The power device comprises a communication interface and a control circuit. The control circuit is configured to connect a network through the communication interface, and to execute a web server program to provide a web-based user interface. The web-based user interface is configured to provide a plurality of web pages, and the web pages are configured to present a plurality of different related information of the power device. The web-based user interface is further configured to provide a virtual button. When the control circuit determines that the virtual button is clicked once, the control circuit collects the related information from different addresses corresponding to the related information in a memory space, and packages the collected related information as a single file, so as to perform a follow-up process on this single file.Type: GrantFiled: April 7, 2020Date of Patent: May 3, 2022Assignee: CYBER POWER SYSTEMS, INC.Inventors: Hung-Chun Chien, Yung-Hao Peng, Yu-Chen Kuo, Shang-Hsiu Yang
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Publication number: 20210091594Abstract: A power device and an operating method thereof are provided. The power device comprises a communication interface and a control circuit. The control circuit is configured to connect a network through the communication interface, and to execute a web server program to provide a web-based user interface. The web-based user interface is configured to provide a plurality of web pages, and the web pages are configured to present a plurality of different related information of the power device. The web-based user interface is further configured to provide a virtual button. When the control circuit determines that the virtual button is clicked once, the control circuit collects the related information from different addresses corresponding to the related information in a memory space, and packages the collected related information as a single file, so as to perform a follow-up process on this single file.Type: ApplicationFiled: April 7, 2020Publication date: March 25, 2021Inventors: HUNG-CHUN CHIEN, YUNG-HAO PENG, YU-CHEN KUO, SHANG-HSIU YANG
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Publication number: 20200357955Abstract: A red light emitting diode including an epitaxial stacked layer, a first and a second electrodes and a first and a second electrode pads is provided. The epitaxial stacked layer includes a first-type and a second-type semiconductor layers and a light emitting layer. A main light emitting wavelength of the light emitting layer falls in a red light range. The epitaxial stacked layer has a first side adjacent to the first semiconductor layer and a second side adjacent to the second semiconductor layer. The first and the second electrodes are respectively electrically connected to the first-type and the second-type semiconductor layers, and respectively located to the first and the second sides. The first and a second electrode pads are respectively disposed on the first and the second electrodes and respectively electrically connected to the first and the second electrodes. The first and the second electrode pads are located at the first side of the epitaxial stacked layer.Type: ApplicationFiled: March 23, 2020Publication date: November 12, 2020Applicant: Genesis Photonics Inc.Inventors: Tung-Lin Chuang, Yi-Ru Huang, Yu-Chen Kuo, Chih-Ming Shen, Tsung-Syun Huang, Jing-En Huang
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Publication number: 20200274027Abstract: A light emitting diode and manufacturing method thereof are provided. The light emitting diode includes a first-type semiconductor layer, a light emitting layer, a second-type semiconductor layer, a first metal layer, a first current conducting layer, a first bonding layer and a second current conducting layer. The light emitting layer is located between the first-type semiconductor layer and the second-type semiconductor layer. The first metal layer is located on and electrically connected to the first-type semiconductor layer. The first metal layer is located between the first current conducting layer and the first-type semiconductor layer. The first current conducting layer is located between the first bonding layer and the first metal layer. The first current conducting layer is connected to the first-type semiconductor layer by the first current conducting layer and the first metal layer. The first bonding layer has through holes overlapped with the first metal layer.Type: ApplicationFiled: February 17, 2020Publication date: August 27, 2020Applicant: Genesis Photonics Inc.Inventors: Yi-Ru Huang, Yu-Chen Kuo, Sheng-Tsung Hsu, Chih-Ming Shen, Yao-Tang Li, Tung-Lin Chuang, Tsung-Syun Huang, Jing-En Huang
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Publication number: 20200220050Abstract: A light emitting diode (LED) including an epitaxial stacked layer, first and second reflective layers which are disposed at two sides of the epitaxial stacked layer, a current conducting layer and first and second electrodes and a manufacturing thereof are provided. The epitaxial stacked layer includes a first-type and a second-type semiconductor layers and an active layer. A main light emitting surface with a light transmittance >0% and ?10% is formed on one of the two reflective layers. The current conducting layer contacts the second-type semiconductor layer. The first electrode is electrically connected to the first-type semiconductor layer. The second electrode is electrically connected to the second-type semiconductor layer via the current conducting layer. A contact scope of the current conducting layer and the second-type semiconductor layer is served as a light-emitting scope overlapping the two layers, but not overlapping the two electrodes.Type: ApplicationFiled: December 6, 2019Publication date: July 9, 2020Applicant: Genesis Photonics Inc.Inventors: Yi-Ru Huang, Kai-Shun Kang, Tung-Lin Chuang, Yu-Chen Kuo, Yan-Ting Lan, Chih-Ming Shen, Jing-En Huang
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Patent number: 10606291Abstract: A power output control module for power distribution is installed inside a power distributor that is connected to an AC power source and multiple electronic devices to control the AC power outputted to the electronic devices. The power output control module continuously detects whether the AC power inputted is normal. When the AC power source is disconnected by accident, a latch relay is controlled to switch to be open, so that the AC power source and the electronic devices are disconnected. This prevents the instantaneous surge current from damaging the electronic devices when the AC power source resumes its normal output and also increases the safety and reliability of electronic devices.Type: GrantFiled: July 6, 2017Date of Patent: March 31, 2020Assignee: CYBER POWER SYSTEMS INC.Inventors: Hung-Ming Hsieh, Yung-Hao Peng, Yu-Chen Kuo
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Publication number: 20200075821Abstract: A light emitting diode chip including an epitaxy stacked layer, first and second electrodes and a first reflective layer is provided. The epitaxy stacked layer includes first-type and second-type semiconductor layers and a light-emitting layer. The first and second electrodes are respectively electrically connected to the first-type and second-type semiconductor layers. An orthogonal projection of the light-emitting layer on the first-type semiconductor layer is misaligned with an orthogonal projection of the first electrode on the first-type semiconductor layer. The first reflective layer is disposed on the epitaxy stacked layer, the first and second electrodes. An orthogonal projection of the first reflective layer on the second-type semiconductor layer is misaligned with an orthogonal projection of the second electrode on the second-type semiconductor layer. Furthermore, a light emitting diode device is also provided.Type: ApplicationFiled: August 5, 2019Publication date: March 5, 2020Applicant: Genesis Photonics Inc.Inventors: Tung-Lin Chuang, Yi-Ru Huang, Yu-Chen Kuo, Yan-Ting Lan, Chih-Ming Shen, Jing-En Huang