Abstract: A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.

Abstract: A wireless communication method, comprising: forming M groups of data transmission configurations, wherein the mth group of data transmission configuration corresponds to the data transmission scheduled by a maximum number of Km control information sets, where M>0, m=1, . . . , M and Km>0, defining one or more transmission settings for said M groups of data transmission configurations, allocating resources among the one or more transmission settings, generating one or more control information sets associated with said one or more transmission settings, transmitting the one or more control information sets to a wireless network.

Abstract: A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.

Abstract: Methods, systems, and devices are described for reference signal configuration in wireless communication. In one exemplary aspect, a method for wireless communication is disclosed. The method includes receiving one or more signaling that indicates selection of reference signal resources, cell and/or BWP information, and receiving at least one reference signal based thereon.

Abstract: An interconnect structure and methods of forming the same are described. In some embodiments, the structure includes a first dielectric layer and one or more first conductive features disposed in the first dielectric layer. The one or more first conductive features includes a first metal. The structure further includes a plurality of graphene layers disposed on each of the one or more first conductive features, the plurality of graphene layers include a second metal intercalated therebetween, and the second metal is different from the first metal.

Abstract: An interconnection structure, along with methods of forming such, are described. The interconnection structure includes a first portion of a conductive layer, and the conductive layer includes one or more graphene layers. The first portion of the conductive layer includes a first interface portion and a second interface portion opposite the first interface portion, and each of the first and second interface portion includes a metal disposed between adjacent graphene layers. The structure further includes a second portion of the conductive layer disposed adjacent the first portion of the conductive layer, and the second portion of the conductive layer includes a third interface portion and a fourth interface portion opposite the third interface portion. Each of the third and fourth interface portion includes the metal disposed between adjacent graphene layers. The structure further includes a dielectric material disposed between the first and second portions of the conductive layer.

Abstract: A semiconductor structure and method of manufacturing a semiconductor structure are provided. The semiconductor structure comprises at least one two-dimensional (2D) conductive structure; a dielectric structure disposed on the 2D conductive structure; and at least one interconnect structure disposed in the dielectric layer and extending into the 2D conductive structure. The interconnect structure laterally contacts the 2D conductive structure.

Abstract: Method, systems and devices for determining a transport block size (TBS) are disclosed. The method comprises determining the TBS based on a parameter or a signaling associated with an event of determining an intermediate value of a TBS determination procedure, wherein the parameter or a signaling is available for a wireless terminal supporting a release version, wherein the intermediate value is determined based on a plurality of resource parameters, wherein the plurality of resource parameters comprises at least one of the total number of resource elements allocated to the wireless terminal, a rate, a modulation order, and the number of layers.

Abstract: A method for beam failure recovery includes performing, in response to a non-empty intersection existing among time domain resources corresponding to beam failure recovery processes of N frequency domain bandwidths, any one of the following methods: selecting the beam failure recovery process of one frequency domain bandwidth among the beam failure recovery processes of the N frequency domain bandwidths, performing the beam failure recovery process of the selected frequency domain bandwidth, and terminating or suspending beam failure recovery processes of the unselected frequency domain bandwidths; combining the beam failure recovery processes of the N frequency domain bandwidths into a single beam failure recovery process and performing the single beam failure recovery process; or performing the beam failure recovery processes of the N frequency domain bandwidths simultaneously. Here N is a positive integer greater than 1.

Abstract: Provided are methods and devices for transmitting a reference signal. The method comprises: determining a sequence parameter associated with the reference signal, where the sequence parameter is used for generating a sequence, and the sequence parameter hops once every X time domain symbols, where X is an integer greater than or equal to 1; determining the reference signal according to the determined sequence parameter; and transmitting the reference signal.

Abstract: A semiconductor device includes an interconnect structure embedded in a first metallization layer comprising a dielectric material. The interconnect structure includes a first metal material. The semiconductor device includes a first liner structure embedded in the first metallization layer. The first liner structure is extended along one or more boundaries of the interconnect structure in the first metallization layer. The first liner structure includes a second metal material reacted with one or more dopants, the second metal material being different from the first metal material.

Abstract: Provided are a method for transmitting and receiving beams, and a transmitting end and a receiving end. The method for transmitting beams includes: determining, by a transmitting end, X transmission beam groups, where X is an integer greater than or equal to 1; and transmitting, by the transmitting end, one or more transmission beams according to the X transmission beam groups, where the one or more transmission beams belong to the X transmission beam groups. Different transmission beams in a same transmission beam group of the X transmission beam groups are transmitted by the transmitting end only at different time; and transmission beams respectively belonging to different transmission beam groups are able to be transmitted by the transmitting end at the same time.

Abstract: The present disclosure provides a processing method and apparatus for recovering a beam. The method includes: generating a first type of signaling comprising an index corresponding to a resource selected from a set of resources for a reference signal; transmitting the first type of signaling over a random access channel to a base station; assuming a Quasi Co-Location (QCL) relation between the selected resource and a downlink control channel, and the selected resource and a downlink data channel; receiving a second type of signaling carried in the downlink control channel using the assumed QCL relation between the selected resource and the downlink control channel, the second type of signaling further comprising an identification of the terminal device; and receiving a data transmission carried in the downlink data channel according to the QCL relation between the selected resource and the downlink data channel.

Abstract: Methods, systems, and devices for signaling quasi-co-location information in mobile communication technology are described. An exemplary method for wireless communication includes transmitting, from a first communication node and to a second communication node, a signal according to a beam set that comprises a first subset of B beams selected from a pool of beams, wherein B is positive integer. In an example, a beam of the beam set comprises one or more channel property assumptions, one or more reference signals (RSs), one or more RS sets, one or more spatial relation states, one or more quasi-co-location (QCL) states, one or more transmission configuration indicator (TCI) state, one or more spatial domain filters or one or more pre-coding filters.

Abstract: In some embodiments, the present disclosure relates to a semiconductor structure. The semiconductor structure includes a substrate. A liner layer is arranged along a sidewall of the substrate within a cross-sectional view. A conductive 2D material is arranged on the liner layer within the cross-sectional view. The conductive 2D material includes a top surface that is above a top surface of the liner layer. A conductive structure continuously extends from above a top of the conductive 2D material to below a bottom of the conductive 2D material. The conductive 2D material and the liner layer laterally separate the substrate from the conductive structure.

Abstract: An interconnection structure, along with methods of forming such, are described. The interconnection structure includes a first portion of a conductive layer, and the conductive layer includes one or more graphene layers. The first portion of the conductive layer includes a first interface portion and a second interface portion opposite the first interface portion, and each of the first and second interface portion includes a metal disposed between adjacent graphene layers. The structure further includes a second portion of the conductive layer disposed adjacent the first portion of the conductive layer, and the second portion of the conductive layer includes a third interface portion and a fourth interface portion opposite the third interface portion. Each of the third and fourth interface portion includes the metal disposed between adjacent graphene layers. The structure further includes a dielectric material disposed between the first and second portions of the conductive layer.

Abstract: A semiconductor structure and method of manufacturing a semiconductor structure are provided. The semiconductor structure comprises at least one two-dimensional (2D) conductive structure; a dielectric layer disposed on the 2D conductive structure; and at least one interconnect structure disposed in the dielectric layer and extending into the 2D conductive structure, wherein the interconnect structure laterally connects to at least one edge of the 2D conductive structure.

Abstract: An image recognition method includes the steps of: receiving a captured image; acquiring a focusing zone image from a portion of the captured image; processing the captured image and/or the focusing zone image and then making the two images into a batch of image information; and executing an image analysis procedure on the batch of image information to generate an analysis result.

Abstract: Method and apparatus for configuring channel characteristics of a reference signal, and a communication device are described. The method includes determining first type signaling, where the first type signaling carries a first type set and the first set includes a plurality of index elements; and sending the first type signaling to a second communication node.

Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a first interconnect dielectric layer arranged over a substrate. A first interconnect conductive structure extends through the first interconnect dielectric layer. A first capping layer is arranged over the first interconnect conductive structure, and a second capping layer is arranged over the first capping layer. The first capping layer includes a first two-dimensional material that is different than a second two-dimensional material of the second capping layer. An etch stop layer is arranged over the first interconnect dielectric layer and the second capping layer. The integrated chip further includes a second interconnect dielectric layer arranged over the etch stop layer and a second interconnect conductive structure extending through the second interconnect dielectric layer and the etch stop layer to contact the first interconnect conductive structure.