Patents by Inventor Yu-Cheng CHIANG

Yu-Cheng CHIANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240194591
    Abstract: A package structure includes a thermal dissipation structure including a substrate, a first encapsulant laterally covering the substrate, a die disposed on the substrate and including a sensing region, a second encapsulant laterally covering the die, and a redistribution structure disposed on the die and the second encapsulant. An outer sidewall of the second encapsulant is laterally offset from an outer sidewall of the first encapsulant. The die is electrically coupled to the substrate through the redistribution structure, and the redistribution structure includes a hollow region overlying the sensing region of the die.
    Type: Application
    Filed: February 20, 2024
    Publication date: June 13, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20240152273
    Abstract: A memory management method for continuously recording digital content and a circuit system operating the method are provided. The circuit system includes a control circuit, a memory, and a storage device. The memory has a buffer that is defined as a pre-buffer or a main buffer based on a current recording mode. In the method, the circuit system loads continuously-received data and sequentially saves the data in the buffer that is defined as the pre-buffer in a first-in-first-out manner before a start-record instruction is received. After the start-record instruction is received, the data buffered in the pre-buffer is combined with the data that is continuously recorded to the main buffer. This file is then written to the storage device until a stop-record instruction is received.
    Type: Application
    Filed: October 11, 2023
    Publication date: May 9, 2024
    Inventors: Yu-Cheng Lee, Hsien-Yang Chiang
  • Patent number: 11976374
    Abstract: A method and device of removing and recycling metals from a mixing acid solution, includes adsorbing a mixing acid solution with a pH value of ?1 to 4 and a cobalt ion concentration of 100 to 1,000 mg/L by at least two cation resins in series setting to the cobalt ion concentration in the mixing acid solution is less than 10 mg/L, and then adjusting the pH value of the mixing acid solution after adsorption to meet a discharge standard, wherein the particle size of the at least two cation resins in series setting is 150˜1,200 ?m. After the cation resins are saturated by adsorption, regenerating the cation resins by sulfuric acid to form a cobalt sulfate solution, and then electrolytically treating the cobalt sulfate solution to obtain electrolytic cobalt and sulfuric acid electrolyte. The operation process is simple without complicated equipment, and it can effectively recycle metals from mixing acid solutions.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: May 7, 2024
    Assignee: MEGA UNION TECHNOLOGY INCORPORATED
    Inventors: Kuo-Ching Lin, Yung-Cheng Chiang, Shr-Han Shiu, Wei-Rong Tey, Yu-Hsuan Li
  • Publication number: 20240132621
    Abstract: Disclosed herein an isolated neutralizing antibody, which is capable of specifically binding to chitinase-3-like protein-1 (YKL-40) and uses thereof. The neutralizing antibody can further conjugate with a metal chelator to form an antibody complex. Further, labeling the antibody complex with a radioactive metal nuclide results in formation of a radioactive antibody complex, which can be used as a contrast agent and treatment for YKL-40 over-expression-related diseases. The radioactive antibody complex can specifically bind to YKL-40, and can be used for diagnosis and the preparation of the use of the treatment for cancers related to YKL-40 over-expression.
    Type: Application
    Filed: April 18, 2023
    Publication date: April 25, 2024
    Inventors: Ming-Cheng Chang, Ping-Fang Chiang, Yu-Jen Kuo
  • Publication number: 20240088291
    Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chang Sun, Sheng-Chih Lai, Yu-Wei Jiang, Kuo-Chang Chiang, TsuChing Yang, Feng-Cheng Yang, Chung-Te Lin
  • Patent number: 11929318
    Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20240079263
    Abstract: A wafer container includes a frame, a door and at least a pair of shelves. The frame has opposite sidewalls. The pair of the shelves are respectively disposed and aligned on the opposite sidewalls of the frame. Various methods and devices are provided for holding at least one wafer to the shelves during transport.
    Type: Application
    Filed: February 22, 2023
    Publication date: March 7, 2024
    Inventors: Kai-Hung HSIAO, Chi-Chung JEN, Yu-Chun SHEN, Yuan-Cheng KUO, Chih-Hsiung HUANG, Wen-Chih CHIANG
  • Publication number: 20220370522
    Abstract: Disclosed herein is an isolated strain of Lactobacillus amylovorus LAM1345, which is deposited at Deutsche Sammlung von Mikroorganismen and Zellkulturen GmbH under an accession number DSM 33510. Also disclosed herein are a composition including the isolated strain of Lactobacillus amylovorus LAM1345 for reducing trimethylamine (TMA) and/or trimethylamine-n-oxide (TMAO) levels, and use of the isolated strain of Lactobacillus amylovorus LAM1345 for treating a disease associated with at least an elevated one of TMA and TMAO levels in a subject.
    Type: Application
    Filed: June 30, 2021
    Publication date: November 24, 2022
    Inventors: San-Land YOUNG, Hau-Yang TSEN, Chen-Ying HUNG, Yu-Cheng CHIANG
  • Patent number: D1024959
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: April 30, 2024
    Assignee: VOLTRONIC POWER TECHNOLOGY CORP.
    Inventors: You-Sheng Chiang, Yu-Cheng Lu, Juor-Ming Hsieh
  • Patent number: D1026816
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: May 14, 2024
    Assignee: VOLTRONIC POWER TECHNOLOGY CORP.
    Inventors: You-Sheng Chiang, Yu-Cheng Lu, Juor-Ming Hsieh
  • Patent number: D1026817
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: May 14, 2024
    Assignee: VOLTRONIC POWER TECHNOLOGY CORP.
    Inventors: You-Sheng Chiang, Yu-Cheng Lu, Juor-Ming Hsieh