Patents by Inventor Yu-Cheng Chuang
Yu-Cheng Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11985324Abstract: Exemplary video processing methods and apparatuses for encoding or decoding a current block by inter prediction are disclosed. Input data of a current block is received and partitioned into sub-partitions and motion refinement is independently performed on each sub-partition. A reference block for each sub-partition is obtained from one or more reference pictures according to an initial motion vector (MV). A refined MV for each sub-partition is derived by searching around the initial MV with N-pixel refinement. One or more boundary pixels of the reference block for a sub-partition is padded for motion compensation of the sub-partition. A final predictor for the current block is generated by performing motion compensation for each sub-partition according to its refined MV. The current block is then encoded or decoded according to the final predictor.Type: GrantFiled: March 13, 2020Date of Patent: May 14, 2024Assignee: HFI INNOVATION INC.Inventors: Yu-Cheng Lin, Chun-Chia Chen, Chih-Wei Hsu, Ching-Yeh Chen, Tzu-Der Chuang, Yu-Wen Huang
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Publication number: 20240136346Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.Type: ApplicationFiled: April 17, 2023Publication date: April 25, 2024Inventors: Chien Hung LIU, Yu-Sheng CHEN, Yi Ching ONG, Hsien Jung CHEN, Kuen-Yi CHEN, Kuo-Ching HUANG, Harry-HakLay CHUANG, Wei-Cheng WU, Yu-Jen WANG
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Publication number: 20240117316Abstract: The present disclosure provides a method for preparing mesenchymal stem cell-derived extracellular vesicle, the mesenchymal stem cell-derived extracellular vesicle prepared by the method, and use of the mesenchymal stem cell-derived extracellular vesicle for reducing adipogenesis and treating osteoarthritis. The mesenchymal stem cell-derived extracellular vesicle of the present disclosure achieves the effect of reducing adipogenesis and treating osteoarthritis through various efficacy experiments.Type: ApplicationFiled: October 4, 2023Publication date: April 11, 2024Inventors: Yu-Chen Tsai, Ming-Hsi Chuang, Po-Cheng Lin
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Publication number: 20240117314Abstract: The present invention relates to a method for preparing a modified stem cell, including the following steps: a cell culture step: culturing stem cells in a first culture medium of a culture dish at a predetermined cell density, and removing the first culture medium after a first culture time to obtain a first cell intermediate; an activity stimulation step: preserving the first cell intermediate in a freezing container having a cell cryopreservation solution, and performing a constant temperature stimulation treatment or a variable temperature stimulation treatment for at least more than 1 day; and a product collection step: after completing the activity stimulation step, placing the freezing container in an environment at a thawing temperature for thawing, and then removing the cell cryopreservation solution to obtain the modified stem cell. The modified stem cell can release at least one or more of IL-4, IL-5, IL-13, G-CSF, Fractalkine, and EGF.Type: ApplicationFiled: October 3, 2023Publication date: April 11, 2024Inventors: Ruei-Yue Liang, Chia-Hsin Lee, Kai-Ling Zhang, Po-Cheng Lin, Ming-Hsi Chuang, Yu-Chen Tsai, Peggy Leh Jiunn Wong
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Publication number: 20240087933Abstract: A wafer transporting method includes following operations. A plurality of wafers are received in a semiconductor container attached to a mobile vehicle. An air processing system is coupled to a wall of the semiconductor container. The air processing system includes an inlet valve, an outlet valve, a pump between the inlet valve and the outlet valve, and a desiccant coupled to the pump. The semiconductor container is moved. The pump of the air processing system is turned on to extract air from inside the semiconductor container into the air processing system through the inlet valve. Humidity of the air is reduced when the air passes through the desiccant of the air processing system. The air is returned back to the semiconductor container through the outlet valve.Type: ApplicationFiled: November 22, 2023Publication date: March 14, 2024Inventors: YOU-CHENG YEH, MAO-CHIH HUANG, YEN-CHING HUANG, YU HSUAN CHUANG, TAI-HSIANG LIN, JIAN-SHIAN LIN
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Publication number: 20240088026Abstract: A semiconductor device according to embodiments of the present disclosure includes a first die including a first bonding layer and a second die including a second hybrid bonding layer. The first bonding layer includes a first dielectric layer and a first metal coil embedded in the first dielectric layer. The second bonding layer includes a second dielectric layer and a second metal coil embedded in the second dielectric layer. The second hybrid bonding layer is bonded to the first hybrid bonding layer such that the first dielectric layer is bonded to the second dielectric layer and the first metal coil is bonded to the second metal coil.Type: ApplicationFiled: January 17, 2023Publication date: March 14, 2024Inventors: Yi Ching Ong, Wei-Cheng Wu, Chien Hung Liu, Harry-Haklay Chuang, Yu-Sheng Chen, Yu-Jen Wang, Kuo-Ching Huang
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Publication number: 20240071911Abstract: A semiconductor device includes a first die having a first bonding layer; a second die having a second bonding layer disposed over and bonded to the first bonding layer; a plurality of bonding members, wherein each of the plurality of bonding members extends within the first bonding layer and the second bonding layer, wherein the plurality of bonding members includes a connecting member electrically connected to a first conductive pattern in the first die and a second conductive pattern in the second die, and a dummy member electrically isolated from the first conductive pattern and the second conductive pattern; and an inductor disposed within the first bonding layer and the second bonding layer. A method of manufacturing a semiconductor device includes bonding a first inductive coil of a first die to a second inductive coil of a second die to form an inductor.Type: ApplicationFiled: January 31, 2023Publication date: February 29, 2024Inventors: Harry-Haklay Chuang, Wen-Tuo Huang, Li-Feng Teng, Wei-Cheng Wu, Yu-Jen Wang
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Publication number: 20230274782Abstract: A block erase method for a flash memory is provided. The block erase method is to perform block erase on a block with a predetermined block size. The block erase method includes: performing an erase verification on bytes byte-by-byte in the block when performing the block erase; checking an erase step of the byte when the byte does not pass the erase verification; when the erase step of the byte exceeds a predetermined threshold value, performing the block erase with a partitioned block smaller than the predetermined block size, and returning to an erase verification stage to perform the erase verification; and when the erase step of the bytes does not exceed the predetermined threshold value, continuing to perform the block erase with the predetermined block size, and returning to the erasure verification stage to continue to perform the erase verification.Type: ApplicationFiled: December 1, 2022Publication date: August 31, 2023Applicant: Winbond Electronics Corp.Inventors: Lung-Chi Cheng, Ying-Shan Kuo, Jun-Yao Huang, Ju-Chieh Cheng, Yu-Cheng Chuang
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Patent number: 10726890Abstract: A resistive memory apparatus including a memory cell array and a voltage selector circuit is provided. The memory cell array includes a plurality of memory cells. The voltage selector circuit is coupled to the memory cell array. The voltage selector circuit performs a voltage applying operation on the memory cells via a plurality of different signal transmission paths. Each of the signal transmission paths passes one of the memory cells. IR drops of two of the signal transmission paths are substantially identical, and signal transmission directions thereof are different. In addition, an operating method of a resistive memory apparatus is also provided.Type: GrantFiled: November 1, 2018Date of Patent: July 28, 2020Assignee: Winbond Electronics Corp.Inventors: Lih-Wei Lin, Yu-Cheng Chuang, Sung-Yi Lee
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Publication number: 20190172535Abstract: A resistive memory apparatus including a memory cell array and a voltage selector circuit is provided. The memory cell array includes a plurality of memory cells. The voltage selector circuit is coupled to the memory cell array. The voltage selector circuit performs a voltage applying operation on the memory cells via a plurality of different signal transmission paths. Each of the signal transmission paths passes one of the memory cells. IR drops of two of the signal transmission paths are substantially identical, and signal transmission directions thereof are different. In addition, an operating method of a resistive memory apparatus is also provided.Type: ApplicationFiled: November 1, 2018Publication date: June 6, 2019Applicant: Winbond Electronics Corp.Inventors: Lih-Wei Lin, Yu-Cheng Chuang, Sung-Yi Lee
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Patent number: 7475049Abstract: In the present invention, users on the Internet can share and accumulate experiences by referencing to different uses' experience data.Type: GrantFiled: February 21, 2006Date of Patent: January 6, 2009Assignee: National Central UniversityInventors: Yea-Huey Su, Yu-Cheng Chuang, Yu-Yun Cheng, Yi-Min Tseng, Yu-Jhih Huang
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Publication number: 20060277320Abstract: In the present invention, users on the Internet can share and accumulate experiences by referencing to different uses' experience data.Type: ApplicationFiled: February 21, 2006Publication date: December 7, 2006Inventors: Yea-Huey Su, Yu-Cheng Chuang, Yu-Yun Cheng, Yi-Min Tseng, Yu-Jhih Huang
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Patent number: 5848636Abstract: A cooler includes a stationary side plate, a plurality of cooling pipes, a housing and an inlet and outlet cap. The cooling pipes are contained winding around in the housing, with one ends connected with the side plate closed up with the inlet and outlet cap to let A cover is fixed on an upper wall of the housing near the side plate and a hole provided in the upper wall to let hot oil coming from an oil tube fixed in the side plate to flow in the housing to move up and down along separating plates provided vertically in such a way to form an up-and-down passageway for hot oil to be cooled down and flow out of an oil exit in the bottom of the housing.Type: GrantFiled: January 23, 1998Date of Patent: December 15, 1998Inventor: Yu-Cheng Chuang
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Patent number: 5225252Abstract: A glass vacuum flask coating method comprising a step to put a metal material in the gap between an inner flask and an outer flask before said inner and outer flasks being formed into a blank for a glass vacuum flask, after the process of exhausting and tipping-off said metal material being heated by a magnetic field generated from an inductance coil into a metal vapor inside said gap, permitting said metal vapor to be adhered to the glass surface inside said gap, forming into a metal reflecting film thereon.Type: GrantFiled: January 23, 1992Date of Patent: July 6, 1993Inventors: Ming-Wen Chang, Yu-Cheng Chuang