Abstract: A terminal, comprising one or a plurality of processors, wherein the one or plurality of processors execute a machine-readable instruction to perform: receiving an object in a live streaming; displaying the object on the terminal; detecting a keyword in the object corresponding to a function in the live streaming; and triggering the function in response to an operation on the object. The present disclosure may allow the streamers to generate or amend an object such as stickers on the live streaming room in a more flexible manner. At the same time, the viewer may perform an operation on the object to realize a corresponding function in a more convenient manner. Therefore, the interaction among streamers and viewers may be increased, and the user experience may also be enhanced.

Abstract: An integrated circuit package includes a cover plate disposed on a substrate mounted with an integrated circuit chip thereon. The chip is formed with first solder pads coupled respectively and wiredly to pin terminals on the substrate, and second solder pads coupled respectively and wiredly to pinhole terminals in the cover plate, and includes a main circuit unit, a pin transmission unit interconnecting electrically first ports of a main circuit unit and the first solder pads, a pinhole transmission unit interconnecting electrically second ports of the main circuit unit, and a control unit coupled to the pin and pinhole transmission units, and operable to control operation of the pin and pinhole transmission units such that each first port is coupled to a selected first solder pad through the pin transmission unit and that each second port is coupled to a selected second solder pad through the pinhole transmission unit.

Abstract: An integrated circuit package includes a cover plate disposed on a substrate mounted with an integrated circuit chip thereon. The chip is formed with first solder pads coupled respectively and wiredly to pin terminals on the substrate, and second solder pads coupled respectively and wiredly to pinhole terminals in the cover plate, and includes a main circuit unit, a pin transmission unit interconnecting electrically first ports of a main circuit unit and the first solder pads, a pinhole transmission unit interconnecting electrically second ports of the main circuit unit, and a control unit coupled to the pin and pinhole transmission units, and operable to control operation of the pin and pinhole transmission units such that each first port is coupled to a selected first solder pad through the pin transmission unit and that each second port is coupled to a selected second solder pad through the pinhole transmission unit.

Abstract: A method used for digital right management (DRM) of system-on-chip (SOC) IP by making use of a system platform, which provides an encryption & protection mechanism created by incorporating the IP designer, the IP supplier, the wafer manufacturer, the customer, and the electronic design automation (EDA) tool, thus establishing an integral and efficient SOC IP management and protection platform. In this method, the IP core hardware program codes are protected through incorporating an IP identification code (comprising a general ID code and a security ID code) into the behavior design level of the IP core hardware program codes and utilizing a public key encryption protection of the SOC IP. Therefore, through such a kind of encryption, the customer is not able to perceive the existence of the IP identification code.

Abstract: The present invention provides a method for IC identification. It can be used to identify the origin of the IC design, wherein said IC comprises at least a testing circuit for testing the functional correctness of said IC, and said testing circuit is activated by a testing activation signal. The testing circuit, after receiving a testing signal, will generate a testing result. The identification method comprises the steps of (1). providing an original identification data representing the origin of the IC; (2). transforming the original identification data into a digital identification data; (3). providing an identification circuit for generating the digital identification data, wherein the identification circuit is activated by the testing activation signal, and generates the digital identification data; (4).

Abstract: The present invention provides a method for IC identification. It can be used to identify the origin of the IC design, wherein said IC comprises at least a testing circuit for testing the functional correctness of said IC, and said testing circuit is activated by a testing activation signal. The testing circuit, after receiving a testing signal, will generate a testing result. The identification method comprises the steps of (1). providing an original identification data representing the origin of the IC; (2). transforming the original identification data into a digital identification data; (3). providing an identification circuit for generating the digital identification data, wherein the identification circuit is activated by the testing activation signal, and generates the digital identification data; (4).