Abstract: A method includes depositing a mask layer over a dielectric layer, patterning the mask layer to form a trench, applying a patterned photo resist having a portion over the mask layer, and etching the dielectric layer using the patterned photo resist as an etching mask to form a via opening, which is in a top portion of the dielectric layer. The method further includes removing the patterned photo resist, and etching the dielectric layer to form a trench and a via opening underlying and connected to the trench. The dielectric layer is etched using the mask layer as an additional etching mask. A polymer formed in at least one of the trench and the via opening is removed using nitrogen and argon as a process gas. The trench and the via opening are filled to form a metal line and a via, respectively.

Abstract: Embodiments of the present disclosure provide a radio frequency (RF) return device. One example RF return device generally includes a bracket for coupling to a chamber body, a cover coupled to the bracket, and a contact plate coupled to the cover and configured contact a substrate support. Using the RF return device described herein generally enables a reduction in temperature that the RF return device and its various components are exposed to, increasing the durability and lifetime of the RF return device. In addition, the RF return device disclosed herein may block chemicals (e.g., fluorine (F)) used in the process chamber from attacking components included in the RF return device, thereby providing enhanced protection to the RF return device.

Abstract: An antenna structure is configured to receive a set of feeding signals via a set of signal feeding nodes to resonate. The antenna structure includes a frame assembly and a radiation assembly. The frame assembly has four side walls. The four side walls form a resonance cavity. Two of the four side walls include two vias, and the two vias are electrically connected to the set of signal feeding nodes, and is configured to receive the set of feeding signals. The radiation assembly is correspondingly connected to the frame assembly. The two of the four side walls are adjacent to each other.

Abstract: A braking mechanism of a wheeled device is provided, including: a main body, configured to be connected to the wheeled device including at least one wheel; an adjusting member, disposed on the main body and including a rod and a first abutting member adjustably positioned on the rod; a braking member, movably disposed on the main body; and an elastic member, abutted between the first abutting member and the braking member so that the braking member is biased by the force of the elastic member toward the at least one wheel to frictionally contact the at least one wheel.

Abstract: A braking mechanism of a wheeled device is provided, including: a main body, configured to be connected to the wheeled device including at least one wheel; an adjusting member, disposed on the main body and including a rod and a first abutting member adjustably positioned on the rod; a braking member, movably disposed on the main body; and an elastic member, abutted between the first abutting member and the braking member so that the braking member is biased by the force of the elastic member toward the at least one wheel to frictionally contact the at least one wheel.

Abstract: A semiconductor device and method of manufacture are provided in which a passivation layer is patterned. In embodiments, by-products from the patterning process are removed using the same etching chamber and at the same time as the removal of a photoresist utilized in the patterning process. Such processes may be used during the manufacturing of FinFET devices.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.

Abstract: A stretch-deforming electrode includes a stretching portion. The stretching portion has a first stretching range and a second stretching range, in which the stretching portion has a first length variation and a first resistance variation in the first stretching range and a second length variation and a second resistance variation in the second stretching range. The first resistance variation remains substantially unchanged when the first length variation changes, the second resistance variation changes when the second length variation changes. The second resistance variation is represented by R2, the second length variation is represented by L2, and R2=A×L2, in which A is a positive number between 0.05 and 2.

Abstract: An electronic device includes a main body, a sound guiding tube, a microphone assembly and an adjustment cavity. The device body includes a wall plate. The sound guiding tube is formed on the wall plate of the main body and includes an input end, a first output end and a second output end, and the input end is in communication with the external environment. The microphone assembly is arranged on the main body and in communication with the first output end of the sound guiding tube, and the microphone assembly is acoustically connected to the external environment. The adjustment cavity is arranged in the main body and in communication with the second output end of the sound guiding tube, and the adjustment cavity is acoustically connected to the external environment.

Abstract: The invention discloses a prediction method for porous material of electroacoustic devices and prediction system thereof. The method comprises the following steps. The step (A) is to obtain at least one acoustic parameter of a porous material from an electroacoustic device, and the at least one acoustic parameter comprises a flow resistance value, a specific flow resistance value and a flow resistance ratio. The step (B) is to calculate an actual resistance value of the porous material based on the at least one acoustic parameter. Thereafter, the step (C) establishes an equivalent circuit model corresponding to the electroacoustic device based on the structure configuration and material parameters of the electroacoustic device. At last, step (D) introduces the actual impedance value of the porous material into the equivalent circuit model, and calculates the frequency response curve and impedance curve of the electroacoustic device affected by the porous material.

Abstract: An electronic device includes a main body, a sound guiding tube, a microphone assembly and an adjustment cavity. The device body includes a wall plate. The sound guiding tube is formed on the wall plate of the main body and includes an input end, a first output end and a second output end, and the input end is in communication with the external environment. The microphone assembly is arranged on the main body and in communication with the first output end of the sound guiding tube, and the microphone assembly is acoustically connected to the external environment. The adjustment cavity is arranged in the main body and in communication with the second output end of the sound guiding tube, and the adjustment cavity is acoustically connected to the external environment.

Abstract: A semiconductor device and method of manufacture are provided in which a passivation layer is patterned. In embodiments, by-products from the patterning process are removed using the same etching chamber and at the same time as the removal of a photoresist utilized in the patterning process. Such processes may be used during the manufacturing of FinFET devices.

Abstract: A method includes depositing a mask layer over a dielectric layer, patterning the mask layer to form a trench, applying a patterned photo resist having a portion over the mask layer, and etching the dielectric layer using the patterned photo resist as an etching mask to form a via opening, which is in a top portion of the dielectric layer. The method further includes removing the patterned photo resist, and etching the dielectric layer to form a trench and a via opening underlying and connected to the trench. The dielectric layer is etched using the mask layer as an additional etching mask. A polymer formed in at least one of the trench and the via opening is removed using nitrogen and argon as a process gas. The trench and the via opening are filled to form a metal line and a via, respectively.

Abstract: A semiconductor composite structure includes an electrically conductive bump, and a patterned bonding layer. The electrically conductive bump includes a body portion for being electrically connected to a metal layer of a semiconductor substrate, and a contact portion disposed on the body portion opposite to the metal layer. The patterned bonding layer is disposed on the contact portion opposite to the body portion, and includes an electrically conductive portion and a recess portion depressed relative to the electrically conductive portion. An etching selectivity ratio of the conductive portion relative to the contact portion is greater than 1. A method for making the semiconductor composite structure and a semiconductor device are also disclosed.

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate and forming a bottom layer, a middle layer, and a top layer on the substrate. The method also includes patterning the top layer to form a patterned top layer and patterning the middle layer by a patterning process including a plasma process to form a patterned middle layer. The plasma process is performed by using a mixed gas including hydrogen gas (H2). The method further includes controlling a flow rate of the hydrogen gas (H2) to improve an etching selectivity of the middle layer to the top layer, and the patterned middle layer includes a first portion and a second portion parallel to the first portion, and a pitch is between the first portion and the second portion.

Abstract: A semiconductor device and method of manufacture are provided in which a passivation layer is patterned. In embodiments, by-products from the patterning process are removed using the same etching chamber and at the same time as the removal of a photoresist utilized in the patterning process. Such processes may be used during the manufacturing of FinFET devices.

Abstract: A method includes depositing a mask layer over a dielectric layer, patterning the mask layer to form a trench, applying a patterned photo resist having a portion over the mask layer, and etching the dielectric layer using the patterned photo resist as an etching mask to form a via opening, which is in a top portion of the dielectric layer. The method further includes removing the patterned photo resist, and etching the dielectric layer to form a trench and a via opening underlying and connected to the trench. The dielectric layer is etched using the mask layer as an additional etching mask. A polymer formed in at least one of the trench and the via opening is removed using nitrogen and argon as a process gas. The trench and the via opening are filled to form a metal line and a via, respectively.

Abstract: An earphone storage device includes a charging storage box. A top cover that can be closed is provided on the charging storage box. A storage tank and a cleaning device are provided in the charging storage box, and a charging assembly is provided at the bottom of the storage tank. The cleaning device includes a dust removal assembly, a disinfection assembly and a sterilization assembly. A rotating shaft and a rotating motor are rotatably provided at the center of the top cover. The rotating motor is connected with the rotating shaft, the rotating shaft is connected with a rotating disc, and the rotating disc is provided with three mounting grooves. The dust removal assembly, the disinfection assembly and the sterilization assembly are respectively fixed in the three mounting grooves. When the top cover is closed, the storage tank is located directly below a rotation track of the mounting groove.

Abstract: A semiconductor structure includes an etching stop layer over an inter-layer dielectric (ILD) layer; a low-k dielectric layer over the etching stop layer; and a tapered conductor extending through the low-k dielectric layer and the etching stop layer and partially through the ILD layer; wherein the tapered conductor includes a recess disposed within the ILD layer and indented towards the etching stop layer and the low-k dielectric layer, and a protrusion surrounding the recess and protruded from the etching stop layer towards the ILD layer.