Patents by Inventor Yu-Cheng Tsao

Yu-Cheng Tsao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10819631
    Abstract: A network device supporting TRILL protocol includes a memory, a processor, and a communication interface. The memory includes a lookup table stored therein. The processor is coupled to the memory. The communication interface is coupled to the processor. The communication interface includes a trunk port and an access port and is configured to receive a first packet. When the processor determines that an output port corresponding to a destination address of the first packet is the trunk port, and determines that there is a lack of nickname information corresponding to the destination address according to the look up table, a second packet is transmitted through the trunk port of the communication interface. The second packet includes an enable local bit. The second packet and the first packet include the same payload information.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: October 27, 2020
    Assignee: ACCTON TECHNOLOGY CORPORATION
    Inventors: Tan-Chun Lu, Yu-Cheng Tsao
  • Patent number: 10395997
    Abstract: The present disclosure relates to a semiconductor process, which includes: (a) providing a semiconductor element; (b) attaching the semiconductor element to a carrier by an adhesive layer, so that the adhesive layer is sandwiched between the semiconductor element and the carrier; and (c) cutting the semiconductor element to form a plurality of semiconductor units. Thereby, the gaps between the semiconductor units are fixed after the cutting process, so as to facilitate testing the semiconductor units.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: August 27, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yu-Cheng Tsao, Cheng-Hung Wang, Chun-Chieh Lin, Hsiu-Hsiung Yang, Yu-Pin Tsai
  • Publication number: 20190253348
    Abstract: A network device supporting TRILL protocol includes a memory, a processor, and a communication interface. The memory includes a lookup table stored therein. The processor is coupled to the memory. The communication interface is coupled to the processor. The communication interface includes a trunk port and an access port and is configured to receive a first packet. When the processor determines that an output port corresponding to a destination address of the first packet is the trunk port, and determines that there is a lack of nickname information corresponding to the destination address according to the look up table, a second packet is transmitted through the trunk port of the communication interface. The second packet includes an enable local bit. The second packet and the first packet include the same payload information.
    Type: Application
    Filed: February 13, 2019
    Publication date: August 15, 2019
    Inventors: Tan-Chun LU, Yu-Cheng TSAO
  • Publication number: 20170125310
    Abstract: The present disclosure relates to a semiconductor process, which includes: (a) providing a semiconductor element; (b) attaching the semiconductor element to a carrier by an adhesive layer, so that the adhesive layer is sandwiched between the semiconductor element and the carrier; and (c) cutting the semiconductor element to form a plurality of semiconductor units. Thereby, the gaps between the semiconductor units are fixed after the cutting process, so as to facilitate testing the semiconductor units.
    Type: Application
    Filed: January 18, 2017
    Publication date: May 4, 2017
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yu-Cheng TSAO, Cheng-Hung WANG, Chun-Chieh LIN, Hsiu-Hsiung YANG, Yu-Pin TSAI
  • Patent number: 9564376
    Abstract: The present disclosure relates to a semiconductor process, which includes: (a) providing a semiconductor element; (b) attaching the semiconductor element to a carrier by an adhesive layer, so that the adhesive layer is sandwiched between the semiconductor element and the carrier; and (c) cutting the semiconductor element to form a plurality of semiconductor units. Thereby, the gaps between the semiconductor units are fixed after the cutting process, so as to facilitate testing the semiconductor units.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: February 7, 2017
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yu-Cheng Tsao, Cheng-Hung Wang, Chun-Chieh Lin, Hsiu-Hsiung Yang, Yu-Pin Tsai
  • Publication number: 20150132867
    Abstract: The present disclosure relates to a semiconductor process, which includes: (a) providing a semiconductor element; (b) attaching the semiconductor element to a carrier by an adhesive layer, so that the adhesive layer is sandwiched between the semiconductor element and the carrier; and (c) cutting the semiconductor element to form a plurality of semiconductor units. Thereby, the gaps between the semiconductor units are fixed after the cutting process, so as to facilitate testing the semiconductor units.
    Type: Application
    Filed: September 23, 2014
    Publication date: May 14, 2015
    Inventors: Yu-Cheng TSAO, Cheng-Hung WANG, Chun-Chieh LIN, Hsiu-Hsiung YANG, Yu-Pin TSAI
  • Patent number: 7301355
    Abstract: An MEMS probe card with elastic multi-layer structure mainly includes a substrate and a plurality of MEMS probe assemblies. The MEMS probe assemblies are disposed on a plurality of testing pads of the substrate, and each of the MEMS probe assemblies includes a plurality of first layer bridge elements, a second layer bridge element and a probe tip. The first and the second layer bridge elements each forms a -shaped cross-section and has two piers and a beam. The piers of the second layer bridge elements are respectively disposed on the beams of the first layer elements, and the probe tips are disposed on the beams of the second layer bridge elements. According to the stacks formed by the second layer bridge elements disposing on the first layer bridge elements, the probe tips may have more elastic buffer and a better resistance to the compressive strain when probing the bumps or bonding pads on wafers.
    Type: Grant
    Filed: November 10, 2006
    Date of Patent: November 27, 2007
    Assignee: Advanced Semiconductor Engineering Inc.
    Inventor: Yu-Cheng Tsao
  • Publication number: 20070152687
    Abstract: An MEMS probe card with elastic multi-layer structure mainly includes a substrate and a plurality of MEMS probe assemblies. The MEMS probe assemblies are disposed on a plurality of testing pads of the substrate, and each of the MEMS probe assemblies includes a plurality of first layer bridge elements, a second layer bridge element and a probe tip. The first and the second layer bridge elements each forms a ?-shaped cross-section and has two piers and a beam. The piers of the second layer bridge elements are respectively disposed on the beams of the first layer elements, and the probe tips are disposed on the beams of the second layer bridge elements. According to the stacks formed by the second layer bridge elements disposing on the first layer bridge elements, the probe tips may have more elastic buffer and a better resistance to the compressive strain when probing the bumps or bonding pads on wafers.
    Type: Application
    Filed: November 10, 2006
    Publication date: July 5, 2007
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING INC.
    Inventor: Yu-Cheng Tsao