Patents by Inventor Yu-Cheng Wang

Yu-Cheng Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240079267
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first diffusion barrier layer made of a dielectric material including a metal element, nitrogen, and oxygen and a first protection layer made of a dielectric material including silicon and oxygen and in direct contact with the top surface of the first diffusion barrier layer. The semiconductor device structure also includes a first thickening layer made of a dielectric material including the metal element and oxygen and in direct contact with the top surface of the first protection layer. A maximum metal content in the first thickening layer is greater than that in the first diffusion barrier layer. The semiconductor device structure further includes a conductive feature surrounded by and in direct contact with the first diffusion barrier layer, the first protection layer, and the first thickening layer.
    Type: Application
    Filed: November 9, 2023
    Publication date: March 7, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Cheng SHIH, Tze-Liang LEE, Jen-Hung WANG, Yu-Kai LIN, Su-Jen SUNG
  • Publication number: 20240081157
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.
    Type: Application
    Filed: November 6, 2023
    Publication date: March 7, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Publication number: 20240071911
    Abstract: A semiconductor device includes a first die having a first bonding layer; a second die having a second bonding layer disposed over and bonded to the first bonding layer; a plurality of bonding members, wherein each of the plurality of bonding members extends within the first bonding layer and the second bonding layer, wherein the plurality of bonding members includes a connecting member electrically connected to a first conductive pattern in the first die and a second conductive pattern in the second die, and a dummy member electrically isolated from the first conductive pattern and the second conductive pattern; and an inductor disposed within the first bonding layer and the second bonding layer. A method of manufacturing a semiconductor device includes bonding a first inductive coil of a first die to a second inductive coil of a second die to form an inductor.
    Type: Application
    Filed: January 31, 2023
    Publication date: February 29, 2024
    Inventors: Harry-Haklay Chuang, Wen-Tuo Huang, Li-Feng Teng, Wei-Cheng Wu, Yu-Jen Wang
  • Publication number: 20240074328
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Publication number: 20230190066
    Abstract: A cleaning equipment includes a first take-up reel, a first supply reel, a frame, a first cleaning film, and a transmission assembly. The frame includes an inner space accommodating the first take-up reel and the first supply reel side by side and an outer surface having at least one gap communicating with the inner space. The first cleaning film has a supply part on the first supply reel, a take-up part on the first take-up reel, and a middle part at least partially covering the outer surface of the frame. Two ends of the middle part enter the inner space through the at least one gap and are connected to the supply part and the take-up part, respectively. The transmission assembly is coupled to the first supply reel and the first take-up reel and drives at least one of the first supply reel and the first take-up reel to rotate.
    Type: Application
    Filed: December 5, 2022
    Publication date: June 22, 2023
    Inventors: CHUNG HANG SIT, WEN LONG SHU, CHUN KUAN WU, YU-CHUNG HSU, KUN-CHU WANG, YU CHENG OU, JIUN-YING YU, BING HUNG YANG, HUNG-TA CHIU, YU-CHENG WANG
  • Publication number: 20230190065
    Abstract: A cleaning robot includes a main body and a cleaning module. The main body is configured to move on a floor along a travelling direction. The cleaning module includes a first shaft and some first roller sets. The first shaft is connected with the main body. The first shaft extends along a first axis perpendicular to the travelling direction. The first roller sets are separated from each other. Each first roller set includes a first bearing, a first tire and a first flexible structure. The first shaft penetrates through the first bearing. The first tire includes a first cleaning surface configured to abut against the floor. The first flexible structure includes a first inner surface and a first outer surface. The first inner surface abuts against the first bearing. The first outer surface abuts against the first tire. The first flexible structure has a first elasticity.
    Type: Application
    Filed: December 21, 2022
    Publication date: June 22, 2023
    Inventors: Kun-Chu Wang, Wen-Long Shu, Chung-Hang Sit, Chun-Kuan Wu, Yu-Chung Hsu, Yu-Cheng Wang, Yu-Cheng Ou, Jiun-Ying Yu, Bing-Hung Yang, Hung-Ta Chiu, Chun-Chang Hung, Shih-Jung Hsu
  • Patent number: 11126470
    Abstract: An allocation method for central processing units and a server using the allocation method are provided. The allocation method includes the following steps: testing a first efficacy of a server and recording a first number of first central processing unit(s) configured to perform a first task, a second number of second central processing unit(s) configured to perform a second task and the first efficacy; determining whether the first central processing unit(s) is in a busy state; increasing the first number when the first central processing unit(s) is in the busy state; determining whether a bandwidth occupied by the first task reaches a maximum bandwidth when the first central processing unit(s) is not in the busy state; increasing the second number when the bandwidth occupied by the first task does not reach the maximum bandwidth; continuously performing the aforementioned steps.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: September 21, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventor: Yu-Cheng Wang
  • Publication number: 20200074914
    Abstract: A display system operation method, including outputting a first enable signal and first data corresponding to a working area of a display panel by a transmitting end of an encoder; receiving the first enable signal and the first data by a receiving end of a receiver; generating a second enable signal and second data in accordance with the shape of the working area, the first enable signal and the first data, wherein the second enable signal includes pulse signals of the working area and a non-working area by the decoder; and enabling the display panel to display an image on the screen in accordance with the second enable signal and the second data by a timing controller.
    Type: Application
    Filed: August 21, 2019
    Publication date: March 5, 2020
    Inventors: Yu-Cheng WANG, Chia-Ming WU, Yi-Cheng CHANG
  • Publication number: 20180181438
    Abstract: An allocation method for central processing units and a server using the allocation method are provided. The allocation method includes the following steps: testing a first efficacy of a server and recording a first number of first central processing unit(s) configured to perform a first task, a second number of second central processing unit(s) configured to perform a second task and the first efficacy; determining whether the first central processing unit(s) is in a busy state; increasing the first number when the first central processing unit(s) is in the busy state; determining whether a bandwidth occupied by the first task reaches a maximum bandwidth when the first central processing unit(s) is not in the busy state; increasing the second number when the bandwidth occupied by the first task does not reach the maximum bandwidth; continuously performing the aforementioned steps.
    Type: Application
    Filed: March 29, 2017
    Publication date: June 28, 2018
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventor: Yu-Cheng WANG
  • Patent number: 9342642
    Abstract: Place-and-route (P&R) includes maintaining a set of local arrival time information and local required time information associated with a circuit layout; determining a candidate fix on a critical path in the circuit layout; statistically determining, using one or more computer processors, a set of one or more adjusted local slacks associated with a region affected by the candidate fix; and in the event that the set of one or more adjusted local slacks indicates that the candidate fix results in a timing improvement, accepting the candidate fix.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: May 17, 2016
    Assignee: Atoptech, Inc.
    Inventors: Yu-Cheng Wang, Wei-Shen Wang
  • Patent number: 9061969
    Abstract: A compound of formula (I) is disclosed: wherein definitions of R1, R2, and R3 are the same as those defined in the specification. The compound of formula (I) can emit light via an intramolecular interaction of an imino group and an electron-donatable moiety contained in the compound. A photoluminescent organic composition is also disclosed, which includes a compound represented by formula (II) in the presence of an electron-donatable compound, wherein definitions of R4, R5, and R6 are the same as those defined in the specification. The photoluminescent organic composition can emit light via an intermolecular interaction of an imino group contained in the compound of formula (II) and an electron-donatable moiety contained in the electron-donatable compound.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: June 23, 2015
    Assignee: I SHOU UNIVERSITY
    Inventors: Jau-Yann Wu, Pei-Ying Tsai, I-Hsiang Wang, Shi-Xuan Chou, Guan-Ru Pan, Shih-Han Wang, Ting-Fan Chou, Ming-Yao Huang, Yu-Cheng Wang
  • Patent number: 9040423
    Abstract: A method for manufacturing a semiconductor device is provided. A substrate having a first area with a first poly layer and a second area with a second poly layer is provided. A nitride HM film is then deposited above the first poly layer of a first device in the first area and above the second poly layer in the second area. Afterwards, a first patterned passivation is formed on the nitride HM film in the first area to cover the nitride HM film and the first device, and a second patterned passivation is formed above the second poly layer in the second area. The second poly layer in the second area is defined by the second patterned passivation.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: May 26, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wan-Fang Chung, Ping-Chia Shih, Hsiang-Chen Lee, Che-Hao Chang, Jhih-Long Lin, Wei-Pin Huang, Shao-Nung Huang, Yu-Cheng Wang, Jaw-Jiun Tu, Chung-Che Huang
  • Publication number: 20150024598
    Abstract: A method for manufacturing a semiconductor device is provided. A substrate having a first area with a first poly layer and a second area with a second poly layer is provided. A nitride HM film is then deposited above the first poly layer of a first device in the first area and above the second poly layer in the second area. Afterwards, a first patterned passivation is formed on the nitride HM film in the first area to cover the nitride HM film and the first device, and a second patterned passivation is formed above the second poly layer in the second area. The second poly layer in the second area is defined by the second patterned passivation.
    Type: Application
    Filed: July 17, 2013
    Publication date: January 22, 2015
    Inventors: Wan-Fang Chung, Ping-Chia Shih, Hsiang-Chen Lee, Che-Hao Chang, Jhih-Long Lin, Wei-Pin Huang, Shao-Nung Huang, Yu-Cheng Wang, Jaw-Jiun Tu, Chung-Che Huang
  • Patent number: 8806412
    Abstract: Place-and-route (P&R) includes maintaining a set of local arrival time information and local required time information associated with a circuit layout; determining a candidate fix on a critical path in the circuit layout; statistically determining, using one or more computer processors, a set of one or more adjusted local slacks associated with a region affected by the candidate fix; and in the event that the set of one or more adjusted local slacks indicates that the candidate fix results in a timing improvement, accepting the candidate fix.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: August 12, 2014
    Assignee: Atoptech, Inc.
    Inventors: Yu-Cheng Wang, Wei-Shen Wang
  • Patent number: 8767737
    Abstract: A data center network system and a packet forwarding method thereof are provided. The data center network system includes a virtual bridge and an address resolution protocol (ARP) server. The virtual bridge intercepts an ARP request having an identification field and a destination IP address field and adds a corresponding virtual data center identification to the identification field of the ARP request and redirecting the ARP request to the ARP server. Additionally, the ARP server queries a corresponding MAC address according to an IP address recorded in the destination IP address field of the ARP request and the corresponding VDCID recorded in the identification field of the ARP request, and transmits the corresponding MAC address in response to the ARP request. Accordingly, the same private IP address can be reused in the data center network system.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: July 1, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Cheng Wang, Cheng-Chun Tu, Tzi-Cker Chiueh
  • Patent number: 8599154
    Abstract: The present invention relates to a method of image touch panel, which comprises the steps of first extracting a background image, comparing the background and a touch image for producing a positioning image, positioning a location of the touch image according to the positioning image for giving the location touched by a user, and hence executing the corresponding function. Thereby, the function of a touch panel can be achieved. By adopting the method of image touch panel according to the present invention, it is not necessary to purchase a physical touch panel to own the functions the touch panel has for executing the functions provided by an electronic product with ease. In addition, the present uses mid- to low-end cameras, and hence reducing the costs.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: December 3, 2013
    Assignee: Chung Yuan Christian University
    Inventors: Yu-Cheng Wang, Shih-Hsiung Twu
  • Publication number: 20130136126
    Abstract: A data center network system and a packet forwarding method thereof are provided. The data center network system includes a virtual bridge and an address resolution protocol (ARP) server. The virtual bridge intercepts an ARP request having an identification field and a destination IP address field and adds a corresponding virtual data center identification to the identification field of the ARP request and redirecting the ARP request to the ARP server. Additionally, the ARP server queries a corresponding MAC address according to an IP address recorded in the destination IP address field of the ARP request and the corresponding VDCID recorded in the identification field of the ARP request, and transmits the corresponding MAC address in response to the ARP request. Accordingly, the same private IP address can be reused in the data center network system.
    Type: Application
    Filed: November 30, 2011
    Publication date: May 30, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Cheng Wang, Cheng-Chun Tu, Tzi-Cker Chiueh
  • Publication number: 20120267572
    Abstract: A compound of formula (I) is disclosed: wherein definitions of R1, R2, and R3 are the same as those defined in the specification. The compound of formula (I) can emit light via an intramolecular interaction of an imino group and an electron-donatable moiety contained in the compound. A photoluminescent organic composition is also disclosed, which includes a compound represented by formula (II) in the presence of an electron-donatable compound, wherein definitions of R4, R5, and R6 are the same as those defined in the specification. The photoluminescent organic composition can emit light via an intermolecular interaction of an imino group contained in the compound of formula (II) and an electron-donatable moiety contained in the electron-donatable compound.
    Type: Application
    Filed: November 4, 2011
    Publication date: October 25, 2012
    Inventors: Jau-Yann WU, Pei-Ying Tsai, I-Hsiang Wang, Shi-Xuan Chou, Guan-Ru Pan, Shih-Han Wang, Ting-Fan Chou, Ming-Yao Huang, Yu-Cheng Wang
  • Patent number: 8034690
    Abstract: An exemplary method of etching an oxide layer and a nitride layer is provided. In particular, a substrate is provided. A surface of the substrate has an isolating structure projecting therefrom. A first oxide layer, a nitride layer and a second oxide layer are sequentially provided on the surface of the substrate, wherein the first oxide layer is uncovered on the isolating structure, the nitride layer is formed overlying the first oxide layer, and the second oxide layer is formed overlying the nitride layer. An isotropic etching process is performed by using an etching mask unmasking the isolating structure, and thereby removing the unmasked portion of the second oxide layer and the unmasked portion of the nitride layer and further exposing sidewalls of the isolating structure. The unmasked portion of the first oxide layer generally is partially removed due to over-etching.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: October 11, 2011
    Assignee: United Microelectronics Corp.
    Inventors: Ping-Chia Shih, Yu-Cheng Wang, Chun-Sung Huang, Yuan-Cheng Yang, Chung-Che Huang, Chin-Fu Lin
  • Publication number: 20110189859
    Abstract: An exemplary method of etching an oxide layer and a nitride layer is provided. In particular, a substrate is provided. A surface of the substrate has an isolating structure projecting therefrom. A first oxide layer, a nitride layer and a second oxide layer are sequentially provided on the surface of the substrate, wherein the first oxide layer is uncovered on the isolating structure, the nitride layer is formed overlying the first oxide layer, and the second oxide layer is formed overlying the nitride layer. An isotropic etching process is performed by using an etching mask unmasking the isolating structure, and thereby removing the unmasked portion of the second oxide layer and the unmasked portion of the nitride layer and further exposing sidewalls of the isolating structure. The unmasked portion of the first oxide layer generally is partially removed due to over-etching.
    Type: Application
    Filed: January 29, 2010
    Publication date: August 4, 2011
    Inventors: Ping-Chia Shih, Yu-Cheng Wang, Chun-Sung Huang, Yuan-Cheng Yang, Chung-Che Huang, Chin-Fu Lin