Patents by Inventor Yu-Cheng Yang

Yu-Cheng Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240119875
    Abstract: A mending method for a display includes the steps of making a display device light to make a plurality of light emitting positions thereof shine, searching out a plurality of defect positions among the light emitting positions, providing a transferring device having a transferring surface with a plurality of miniature light emitting elements positioned correspondingly to the light emitting positions, planning a mending procedure which includes in the area the transferring surface corresponds to, choosing in chief the largest number of defect positions able to be mended at a single time according to the positions of the miniature light emitting elements and then in the area the transferring surface corresponds to, planning the rest of the defect positions according to the rest of the miniature light emitting elements, and according to the mending procedure, moving the transferring device to weld the miniature light emitting elements at the defect positions.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 11, 2024
    Inventors: Tsan-Jen CHEN, Chih-Hao TSAI, Yu-Cheng YANG, Jen-Hung Lo, Yan-Ru TSAI
  • Patent number: 11940658
    Abstract: An optical fiber module is provided and includes an optical fiber structure, a light-absorbing area and a photoelectric sensor in a housing. The optical fiber structure collectively arranges a plurality of first optical fibers to form at least one optical fiber bundle with a tapered end, and a second optical fiber is connected to the tapered end of the optical fiber bundle to converge the optical fiber bundle to the second optical fiber. The light-absorbing area corresponds to an end of the second optical fiber, such that the light-absorbing area absorbs scattering signals escaped and scattered when signals are transmitted from the plurality of first optical fibers to the second optical fiber. The photoelectric sensor is arranged corresponding to the plurality of first optical fibers to receive target signals escaped and refracted when the signals are transmitted from the second optical fiber to the plurality of first optical fibers.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: March 26, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hsin-Chia Su, Ying-Hui Yang, Yu-Cheng Song, Tsung-Jun Ho
  • Publication number: 20240096712
    Abstract: Provided is a semiconductor device includes a gate electrode, a gate dielectric layer, a channel layer, an insulating layer, a first source/drain electrode and a second source/drain electrode, a second dielectric layer, and a stop segment. The gate electrode is located within a first dielectric layer that overlies a substrate. The gate dielectric layer is located over the gate electrode. The channel layer is located on the gate dielectric layer. The insulating layer is located over the channel layer. The first source/drain electrode and the second source/drain electrode are located in the insulating layer, and connected to the channel layer. The second dielectric layer is beside one of the first source/drain electrode and the second source/drain electrode. The stop segment is embedded in the second dielectric layer.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wei Jiang, Chieh-Fang Chen, Yen-Chung Ho, Pin-Cheng Hsu, Feng-Cheng Yang, Chung-Te Lin
  • Publication number: 20240084455
    Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 14, 2024
    Inventors: Che Wei YANG, Chih Cheng SHIH, Kuo Liang LU, Yu JIANG, Sheng-Chan LI, Kuo-Ming WU, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
  • Publication number: 20240088246
    Abstract: Various embodiments of the present application are directed towards a control gate layout to improve an etch process window for word lines. In some embodiments, an integrated chip comprises a memory array, an erase gate, a word line, and a control gate. The memory array comprises a plurality of cells in a plurality of rows and a plurality of columns. The erase gate and the word line are elongated in parallel along a row of the memory array. The control gate is elongated along the row and is between and borders the erase gate and the word line. Further, the control gate has a pad region protruding towards the erase gate and the word line. Because the pad region protrudes towards the erase gate and the word line, a width of the pad region is spread between word-line and erase-gate sides of the control gate.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: Yu-Ling Hsu, Ping-Cheng Li, Hung-Ling Shih, Po-Wei Liu, Wen-Tuo Huang, Yong-Shiuan Tsair, Chia-Sheng Lin, Shih Kuang Yang
  • Publication number: 20240081078
    Abstract: A memory device includes a multi-layer stack, a channel layer, a memory material layer and at least three conductive pillars. The multi-layer stack is disposed on a substrate and includes a plurality of conductive layers and a plurality of dielectric layers stacked alternately. The channel layer and memory material layer penetrate through the plurality of conductive layers and the plurality of dielectric layers. The at least three conductive pillars are surrounded by the channel layer and the memory material layer, wherein the at least three conductive pillars are electrically connected to conductive layers respectively. The at least three conductive pillars includes a first, a second and a third conductive pillars disposed between the first conductive pillar and the second conductive pillar. A third width of the third conductive pillar is smaller than a first width of the first conductive pillar and a second width of the second conductive pillar.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wei Jiang, Pin-Cheng Hsu, Feng-Cheng Yang, Chung-Te Lin
  • Publication number: 20240079434
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor including first chip and a second chip. The first chip includes a first substrate, a plurality of photodetectors disposed in the first substrate, a first interconnect structure disposed on a front side of the first substrate, and a first bond structure disposed on the first interconnect structure. The second chip underlies the first chip. The second chip includes a second substrate, a plurality of semiconductor devices disposed on the second substrate, a second interconnect structure disposed on a front side of the second substrate, and a second bond structure disposed on the second interconnect structure. A first bonding interface is disposed between the second bond structure and the first bond structure. The second interconnect structure is electrically coupled to the first interconnect structure by way of the first and second bond structures.
    Type: Application
    Filed: January 5, 2023
    Publication date: March 7, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Chen-Jong Wang, Dun-Nian Yaung, Yu-Chun Chen
  • Patent number: 11539235
    Abstract: A power conversion circuit for an uninterruptible power system, including an inductor, a first capacitor, a second capacitor, a first switch, a second switch, a third switch, a first diode, a second diode, and a third diode body, is provided. A terminal of the second switch is electrically coupled to the inductor through the first switch, and another terminal of the second switch is electrically coupled to a neutral wire and the third switch. An anode and a cathode of the first diode are electrically coupled to the first switch and a positive DC bus, respectively. A cathode and an anode of the second diode are electrically coupled to the first switch and the third switch, respectively. A cathode and an anode of the third diode are electrically coupled to the third switch and a negative DC bus, respectively. In addition, an uninterruptible power system using the same is provided.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: December 27, 2022
    Assignee: CYBER POWER SYSTEMS, INC.
    Inventors: Yu-Cheng Yang, Kuang-Yu Yang, Cheng-Hsin Yeh
  • Publication number: 20220216384
    Abstract: An electronic device includes a plurality of micro-optoelectronic components and a circuit board. Each of micro-optoelectronic components includes a semiconductor layer, and metal electrodes electrically coupled to the semiconductor layer and exposed on a surface of the semiconductor layer. The circuit board includes a metal circuit layer and a plurality of solder joints. The solder joints are formed on said metal circuit layer, and connected to said metal electrodes. A portion of each of metal electrodes and each of solder joints are welded to form a metal crystalline structure. The metal crystalline structure includes the composition of the metal electrode and/or the composition of the metal circuit layer.
    Type: Application
    Filed: January 5, 2022
    Publication date: July 7, 2022
    Inventors: Jen-Hung LO, YU-CHENG YANG, CHIH-HAO TSAI, TSAN-JEN CHEN
  • Publication number: 20200371056
    Abstract: A gas sensing device comprises a silicon substrate, an insulating layer, a plasma treatment layer, a metal electrode and a sensing layer. The insulating layer is formed on the silicon substrate. The plasma treatment layer is formed on the insulating layer. The metal electrode is formed on the portion of the plasma treatment layer. The sensing layer is formed on a surface of the metal electrode and the plasma treatment layer. Through plasma treatment for the substrate and printing graphene film on the substrate and the electrode, the adsorption characteristics of gas selection ratio for graphene is improved, and the processing time of the plasma treatment is adjusted to optimize the sensing characteristics.
    Type: Application
    Filed: September 9, 2019
    Publication date: November 26, 2020
    Inventors: CHAO-SUNG LAI, CHIA-MING YANG, TSUNG-CHENG CHEN, YU-CHENG YANG
  • Patent number: 10139444
    Abstract: A sensing device for power transmission line includes an induction coil device, a sensing circuit device, and a housing. A plurality of iron cores and a plurality of windings defined in the induction coil device. The windings are wound around the iron cores. A hole for power transmission line is defined in the induction coil device. The sensing circuit device detects operation status of a power transmission line and environmental parameters. The sensing circuit device includes a cover and a bottom plate. Multiple circuit boards are mounted on the bottom plate. The induction coil device is mounted on one side of the cover. Each of two ends of the housing has a streamline shape. The housing is hollow for receiving the sensing circuit device. The iron cores of the induction coil device includes at least one first iron core and at least one second iron core.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: November 27, 2018
    Assignee: NATIONAL TAIWAN UNIVERSITY
    Inventors: Joe-Air Jiang, Xiang-Yao Zheng, Chien-Hao Wang, Yu-Cheng Yang, Ching-Ya Tseng
  • Publication number: 20170285091
    Abstract: A sensing device for power transmission line includes an induction coil device, a sensing circuit device, and a housing. A plurality of iron cores and a plurality of windings defined in the induction coil device. The windings are wound around the iron cores. A hole for power transmission line is defined in the induction coil device. The sensing circuit device detects operation status of a power transmission line and environmental parameters. The sensing circuit device includes a cover and a bottom plate. Multiple circuit boards are mounted on the bottom plate. The induction coil device is mounted on one side of the cover. Each of two ends of the housing has a streamline shape. The housing is hollow for receiving the sensing circuit device. The iron cores of the induction coil device includes at least one first iron core and at least one second iron core.
    Type: Application
    Filed: October 25, 2016
    Publication date: October 5, 2017
    Inventors: Joe-Air Jiang, Xiang-Yao Zheng, Chien-Hao Wang, Yu-Cheng Yang, Ching-Ya Tseng
  • Publication number: 20160126665
    Abstract: A magnetic electrical appliance connecting structure includes an inserting connection member and an accommodating connection member. The inserting connection member includes an inserting connection housing, two first magnetic elements and a plurality of first conductive elements. Each first conductive element includes a flexible portion, an extension portion and an electrical connection protruding portion. The accommodating connection member includes an accommodating connection housing, two second magnetic elements adapted to be respectively magnetically attracted the two first magnetic elements, and a plurality of second conductive elements. Each second conductive element includes a body and an electrical connection recessed portion.
    Type: Application
    Filed: November 4, 2014
    Publication date: May 5, 2016
    Inventor: YU-CHENG YANG
  • Patent number: 8576665
    Abstract: An underwater wireless sensor is provided. The underwater wireless sensor comprises a floating-diving device enabling the underwater wireless sensor to dive to a first predetermined water depth in response to a predetermined condition; a sensing device converting a plurality of environmental parameters into a plurality of environmental messages; a micro controller receiving the environmental messages and sending a command signal including the environmental messages; and a communication device receiving the command signal, sending the command signal via a wireless sensor network, receiving an external message including a second predetermined water depth, and sending the external message to the micro controller so that the micro controller performs a corresponding operation and sends out a control signal to enable the underwater wireless sensor to move to the second predetermined water depth.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: November 5, 2013
    Assignee: National Taiwan University
    Inventors: Joe-Air Jiang, Yu-Cheng Yang, Wei-Sheng Su, Cheng-Long Chuang, Tzu-Shiang Lin
  • Patent number: 8461866
    Abstract: A device for storing pulse latch with logic circuit and thus having signal maintaining function is provided, wherein the device is composed of a data signal, a scan data input signal, a stored signal, a choosing data input signal, a time clock signal, a restoring signal, a first signal channel, a scan latch, a second signal channel, a pulse latch, a normal output signal, an output signal, a first OR gate, a second OR gate, a third OR gate, a AND gate and an inverter connecting to one another. The device may store the data when being switch off and restore the data when being switch on again.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: June 11, 2013
    Assignee: Global Unichip Corporation
    Inventors: Yu-Cheng Yang, Hsin Wei Hung, Hung-Chun Li, Teng-Nan Liao
  • Publication number: 20130134484
    Abstract: An abutment structure comprises a power rail, a ground rail parallel to the power rail, first cells and second cells. An area is defined between the power and the ground rails. A portion of each first and second cell overlaps the power and the ground rails, and another portion thereof is within the area. The first cells are within the abutment structure with original patterns thereof. The second cells respectively has an original pattern and a base pattern being a flip pattern of the original pattern, and are within the area with alternate of the original and the base patterns. The first and the second cells are within the area alternately without overlapping. Alternatively, the first and the second cells may also be within different areas, and the second cells are within different areas respectively with the base pattern and a flip pattern of the base pattern thereof.
    Type: Application
    Filed: November 13, 2012
    Publication date: May 30, 2013
    Inventors: Yi-Fon CHEN, Yu-Cheng YANG, Jye-Yuan LEE
  • Patent number: 8446022
    Abstract: A shock absorber includes a resilient element; a gear set comprising a first non-return gear and a second non-return gear; and an electric generator driven by the first non-return gear to generate a power when the resilient element is compressed and driven by the second non-return gear when the resilient element is loosened.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: May 21, 2013
    Assignee: National Taiwan University
    Inventors: Joe-Air Jiang, Wei-Sheng Su, Yu-Cheng Yang, Cheng-Long Chuang, Tzu-Shiang Lin
  • Patent number: 8310302
    Abstract: An abutment structure comprises a power rail, a ground rail parallel to the power rail, first cells and second cells. An area is defined between the power and the ground rails. A portion of each first and second cell overlaps the power and the ground rails, and another portion thereof is within the area. The first cells are within the abutment structure with original patterns thereof. The second cells respectively has an original pattern and a base pattern being a flip pattern of the original pattern, and are within the area with alternate of the original and the base patterns. The first and the second cells are within the area alternately without overlapping. Alternatively, the first and the second cells may also be within different areas, and the second cells are within different areas respectively with the base pattern and a flip pattern of the base pattern thereof.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: November 13, 2012
    Assignee: Global Unichip Corporation
    Inventors: Yi-Fon Chen, Yu-Cheng Yang, Jye-Yuan Lee
  • Publication number: 20120049948
    Abstract: An abutment structure comprises a power rail, a ground rail parallel to the power rail, first cells and second cells. An area is defined between the power and the ground rails. A portion of each first and second cell overlaps the power and the ground rails, and another portion thereof is within the area. The first cells are within the abutment structure with original patterns thereof. The second cells respectively has an original pattern and a base pattern being a flip pattern of the original pattern, and are within the area with alternate of the original and the base patterns. The first and the second cells are within the area alternately without overlapping. Alternatively, the first and the second cells may also be within different areas, and the second cells are within different areas respectively with the base pattern and a flip pattern of the base pattern thereof.
    Type: Application
    Filed: March 9, 2011
    Publication date: March 1, 2012
    Applicant: Global Unichip Corporation
    Inventors: Yi-Fon Chen, Yu-Cheng Yang, Jye-Yuan Lee
  • Publication number: 20120025867
    Abstract: A device for storing pulse latch with logic circuit and thus having signal maintaining function is provided, wherein the device is composed of a data signal, a scan data input signal, a stored signal, a choosing data input signal, a time clock signal, a restoring signal, a first signal channel, a scan latch, a second signal channel, a pulse latch, a normal output signal, an output signal, a first OR gate, a second OR gate, a third OR gate, a AND gate and an inverter connecting to one another. The device may store the data when being switch off and restore the data when being switch on again.
    Type: Application
    Filed: April 20, 2011
    Publication date: February 2, 2012
    Applicant: Global Unichip Corporation
    Inventors: Yu-Cheng Yang, Hsin Wei Hung, Hung-Chun Li, Teng-Nan Liao