Patents by Inventor Yu-Cheung Cheung

Yu-Cheung Cheung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7028219
    Abstract: A Registration protocol is used in transaction processing for normal operations. If an error occurs, the system reverts to a Full Broadcast protocol. The Registration Protocol reduces the number of messages that are sent among CPUs in a cluster thereby permitting performance improvements in the system. The Registration Protocol has Begin, DP2 Check, Phase 1 Flush and Phase 2 (lock release) phases just as does the Full Broadcast Protocol, thereby permitting the Full Broadcast protocol to step in at any phase after an error is detected.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: April 11, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Charles Stuart Johnson, David J. Wisler, Trina R. Wisler, William James Carley, Yu-Cheung Cheung, Albert Gondi, Sitaram V. Lanka
  • Publication number: 20030204771
    Abstract: A Registration protocol is used in transaction processing for normal operations. If an error occurs, the system reverts to a Full Broadcast protocol. The Registration Protocol reduces the number of messages that are sent among CPUs in a cluster thereby permitting performance improvements in the system. The Registration Protocol has Begin, DP2 Check, Phase 1 Flush and Phase 2 (lock release) phases just as does the Full Broadcast Protocol, thereby permitting the Full Broadcast protocol to step in at any phase after an error is detected.
    Type: Application
    Filed: November 21, 2002
    Publication date: October 30, 2003
    Inventors: Charles Stuart Johnson, David J. Wisler, Trina R. Wisler, William James Carley, Yu-Cheung Cheung, Albert Gondi, Sitaram V. Lanka
  • Patent number: 6360303
    Abstract: A symmetrical processing system includes a number of processor units sharing a memory element. At least a portion of the memory element is partitioned so that separate memory partitions are made exclusively available to some if not all the processor units.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: March 19, 2002
    Assignee: Compaq Computer Corporation
    Inventors: David Wisler, Yu-Cheung Cheung, Charles W. Johnson
  • Patent number: 5964838
    Abstract: A computing system comprising a number of multiple processor unit nodes interconnectively connected by a communications system to form a cluster is initialized in a manner that creates separate, independent execution environments for each processor unit. Each multiple processor unit node is configured to operate as a symmetric multiprocessing system with a single, shared memory. During a Startup procedure, memory area segments are created for each processor unit, providing processes running on that processor unit with mutually exclusive access to the associated memory area segment. Startup determines an order of the nodes of the cluster system, and establishes a Coordinator process in the lowest numbered processor unit in the first node of the order. The Coordinator process, when created, directs the remainder of the Startup procedure, and constructs a succession list that identifies the next processor unit in the order to take over the Coordinator process should the first fail.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: October 12, 1999
    Assignee: Tandem Computers Incorporated
    Inventors: Yu-Cheung Cheung, William J. Carley