Abstract: A semiconductor device includes a fin structure disposed over a substrate. The semiconductor device includes a first interfacial layer straddling the fin structure. The semiconductor device includes a gate dielectric layer extending along sidewalls of the fin structure. The semiconductor device includes a second interfacial layer overlaying a top surface of the fin structure. The semiconductor device includes a gate structure straddling the fin structure. The first interfacial layer and the gate dielectric layer are disposed between the sidewalls of the fin structure and the gate structure.

Abstract: A method of reclaiming a used seal includes boiling the used seal in a liquid, and after boiling the used seal in the liquid, baking the used seal. The boiling the used seal may include boiling for a predetermined boiling time in the liquid, and the baking the used seal may include baking the used seal for a predetermined bake time at a predetermined temperature.

Abstract: A method of reclaiming a used seal includes boiling the used seal in a liquid, and after boiling the used seal in the liquid, baking the used seal. The boiling the used seal may include boiling for a predetermined boiling time in the liquid, and the baking the used seal may include baking the used seal for a predetermined bake time at a predetermined temperature.

Abstract: A method for performing active jammer suppression on an electronic device includes: performing down conversion on a received signal having in-band interference, in order to obtain at least one down-converted received signal; performing down conversion on a jammer signal derived from a jammer source causing the in-band interference, in order to obtain at least one down-converted jammer signal; adjusting a phase and/or an amplitude of the down-converted jammer signal to obtain a jammer suppression signal; and performing jammer suppression according to the down-converted received signal and the jammer suppression signal. An apparatus for performing the active jammer suppression on the electronic device includes a received-signal down converter, at least one jammer down converter, and at least one adjustment module. In particular, the adjustment module is arranged to iteratively adjust the phase and/or the amplitude of the down-converted jammer signal to obtain an optimal version of the jammer suppression signal.

Abstract: A method for compensating a clock bias in a Global Navigation Satellite System (GNSS) receiver includes deriving at least one clock drift value comprising a first clock drift value corresponding to a first time point, and calculating the clock bias according to the at least one clock drift value and at least one interval within the time period between the first time point and a specific time point after the first time point. An apparatus for compensating a clock bias in a GNSS receiver is also provided.

Abstract: A method for performing active jammer suppression on an electronic device includes: performing down conversion on a received signal having in-band interference, in order to obtain at least one down-converted received signal; performing down conversion on a jammer signal derived from a jammer source causing the in-band interference, in order to obtain at least one down-converted jammer signal; adjusting a phase and/or an amplitude of the down-converted jammer signal to obtain a jammer suppression signal; and performing jammer suppression according to the down-converted received signal and the jammer suppression signal. An apparatus for performing the active jammer suppression on the electronic device includes a received-signal down converter, at least one jammer down converter, and at least one adjustment module. In particular, the adjustment module is arranged to iteratively adjust the phase and/or the amplitude of the down-converted jammer signal to obtain an optimal version of the jammer suppression signal.

Abstract: A method for compensating a clock bias in a Global Navigation Satellite System (GNSS) receiver includes deriving at least one clock drift value comprising a first clock drift value corresponding to a first time point, and calculating the clock bias according to the at least one clock drift value and at least one interval within the time period between the first time point and a specific time point after the first time point. An apparatus for compensating a clock bias in a GNSS receiver is also provided.