Patents by Inventor Yu-Chia Liu

Yu-Chia Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240381574
    Abstract: An immersion cooling device includes a housing defining a receiving chamber, a working liquid received in the receiving chamber, a condenser received in the receiving chamber and located outside the working liquid, and a blocking member received in the receiving chamber. The blocking member includes a plurality of blocking bodies dispersed on a top surface of the working liquid.
    Type: Application
    Filed: July 13, 2023
    Publication date: November 14, 2024
    Inventors: TSUNG-LIN LIU, CHUN-WEI LIN, YU-CHIA TING, CHIA-NAN PAI
  • Publication number: 20240381573
    Abstract: An immersion cooling device includes a housing defining a chamber, a working liquid received in the chamber, a condenser received in the chamber and located outside the working liquid, and at least one support plate received in the chamber. Each of the at least one support plate includes a first portion and a second portion connected to the first portion. The first portion is immersed in the working liquid and configured to hold an electronic device. The second portion protrudes from the working liquid. The second portion defines a slot extending through the second portion, and an opening of the slot faces the condenser.
    Type: Application
    Filed: July 13, 2023
    Publication date: November 14, 2024
    Applicant: Fulian Precision Electronics (Tianjin) Co., LTD.
    Inventors: CHUN-WEI LIN, TSUNG-LIN LIU, YU-CHIA TING, CHIA-NAN PAI
  • Patent number: 12134555
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Grant
    Filed: May 11, 2023
    Date of Patent: November 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Publication number: 20240341062
    Abstract: A two-phase liquid cooling system for cooling electronic devices includes a housing configured for accommodating the electronic devices, a cooling loop connected to the housing, and an impedance device connected to the cooling loop. The cooling loop includes a supply manifold, a return manifold, and multiple cooling branches connected in parallel between the supply manifold and the return manifold, each cooling branch is configured for transferring cooling liquid to cool one electronic device. The impedance device increases impedance in each of the multiple cooling branches to reduce difference in impedance between each cooling branch and balances the pressure drop in each cooling branch, and thus balancing the cooling liquid flow rate in each cooling branch. A two-phase liquid cooling cabinet and method for liquid cooling of multiple electronic devices with different thermal loads are also disclosed.
    Type: Application
    Filed: August 2, 2023
    Publication date: October 10, 2024
    Inventors: SUNG TSANG, TSUNG-LIN LIU, YU-CHIA TING
  • Publication number: 20240329361
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a circuit assembly. The movable assembly is configured to connect an optical element, the movable assembly is movable relative to the fixed assembly, and the optical element has an optical axis. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The circuit assembly includes a plurality of circuits and is affixed to the fixed assembly.
    Type: Application
    Filed: June 7, 2024
    Publication date: October 3, 2024
    Inventors: Sin-Hong LIN, Yung-Ping YANG, Wen-Yen HUANG, Yu-Cheng LIN, Kun-Shih LIN, Chao-Chang HU, Yung-Hsien YEH, Mao-Kuo HSU, Chih-Wei WENG, Ching-Chieh HUANG, Chih-Shiang WU, Chun-Chia LIAO, Chia-Yu CHANG, Hung-Ping CHEN, Wei-Zhong LUO, Wen-Chang LIN, Shou-Jen LIU, Shao-Chung CHANG, Chen-Hsin HUANG, Meng-Ting LIN, Yen-Cheng CHEN, I-Mei HUANG, Yun-Fei WANG, Wei-Jhe SHEN
  • Publication number: 20240334646
    Abstract: An immersed cooling system for cooling electronic devices includes a cooling tank accommodating coolant and multiple electronic devices and a liquid cooling circuit for circulating coolant, the electronic device includes key components and common components, the liquid cooling circuit includes cooling branches connected to the key components for cooling, the coolant in the cooling branches flows faster than the coolant in the cooling tank, which improves the heat dissipation effect of the key components and the utilization rate of the coolant by cooling the key components and the common components with different flow rates of coolant, reduces the energy consumption of the immersed cooling system and provides a more efficient thermal solution. An immersed cooling cabinet is also provided.
    Type: Application
    Filed: July 13, 2023
    Publication date: October 3, 2024
    Applicant: Fulian Precision Electronics (Tianjin) Co., LTD.
    Inventors: TSUNG-LIN LIU, CHIN-HAN CHAN, YU-CHIA TING, CHUN-WEI LIN, CHIA-NAN PAI
  • Publication number: 20240328078
    Abstract: An artificial leather and a method for manufacturing the artificial leather are provided. The artificial leather includes a fabric layer, a thermoplastic polyolefin layer, a modified thermoplastic polyolefin layer, and a polyurethane surface layer. The thermoplastic polyolefin layer is disposed on the fabric layer. The modified thermoplastic polyolefin layer is disposed on the thermoplastic polyolefin layer. The polyurethane surface layer is attached to the modified thermoplastic polyolefin layer through an adhesive.
    Type: Application
    Filed: March 20, 2024
    Publication date: October 3, 2024
    Inventors: CHIH-YI LIN, Kuo-Kuang Cheng, Chien-Chia Huang, Chi-Chin Chiang, Wen-Hsin Tai, Chieh Lee, Yu-Lun Chen, Yu Hung Liu
  • Publication number: 20240304657
    Abstract: A semiconductor device includes a substrate, a first gate, a plurality of second gates and a resistor. The substrate is defined with an active region and a resistor region. The first gate is disposed in the active region. The first gate has a first length extending along a first direction and a second length extending along a second direction. The plurality of second gates are disposed in the resistor region. Each of the second gates has a third length extending along the first direction and a fourth length extending along the second direction. The first length is equal to the third length, and the second length is equal to the fourth length. The resistor is disposed on the plurality of second gates.
    Type: Application
    Filed: March 29, 2023
    Publication date: September 12, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Chun Teng, Ming-Che Tsai, Ping-Chia Shih, Yi-Chang Huang, Wen-Lin Wang, Yu-Fan Hu, Ssu-Yin Liu, Yu-Nong Chen, Pei-Tsen Shiu, Cheng-Tzung Tsai
  • Patent number: 12077285
    Abstract: The present invention relates to a free propeller assembly structure and an aircraft structure has the free propeller assembly. The free propeller assembly structure has at least one free propeller assembly. Each of the at least one free propeller assembly has a circular shaft, a main rotor, a signal transmitting device, and a rotor blade assembly. The main rotor has a shaft hole and multiple blade mounting structures radially disposed. Each blade mounting structure is provided with a positioning recess for mounting a driving motor in each positioning recess. The signal transmitting device includes multiple signal transmitters that are able to transmit interpretable electronic signals or photonic signals. The rotor blade assembly includes at least two rotor blades. One end of each rotor blade is connected with an open end of the positioning recesses of a corresponding one of the blade mounting structures.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: September 3, 2024
    Inventors: Bao-Shen Liu, Yu-Chia Liu
  • Publication number: 20240290703
    Abstract: A chip package structure includes an interposer structure that contains a package-side redistribution structure, an interposer core assembly, and a die-side redistribution structure. The interposer core assembly includes at least one silicon substrate interposer, and each of the at least one silicon substrate interposer includes a respective silicon substrate, a respective set of through-silicon via (TSV) structures vertically extending through the respective silicon substrate, a respective set of interconnect-level dielectric layers embedding a respective set of metal interconnect structures, and a respective set of metal bonding structures that are electrically connected to the die-side redistribution structure. The chip package structure includes at least two semiconductor dies that are attached to the die-side redistribution structure, and an epoxy molding compound (EMC) multi-die frame that laterally encloses the at least two semiconductor dies.
    Type: Application
    Filed: May 8, 2024
    Publication date: August 29, 2024
    Inventors: Kuo-Lung Pan, Yu-Chia Lai, Teng-Yuan Lo, Mao-Yen Chang, Po-Yuan Teng, Chen-Hua YU, Chung-Shi Liu, Hao-Yi Tsai, Tin-Hao Kuo
  • Publication number: 20230278856
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Application
    Filed: May 11, 2023
    Publication date: September 7, 2023
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 11667517
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: June 6, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 11312623
    Abstract: The present disclosure relates to a method of forming an integrated chip structure. The method includes forming a plurality of interconnect layers within a dielectric structure over a substrate. A dielectric layer arranged along a top of the dielectric structure is patterned to define a via hole exposing an uppermost one of the plurality of interconnect layers. An extension via is formed within the via hole and one or more conductive materials are formed over the dielectric layer and the extension via. The one or more conductive materials are patterned to define a sensing electrode over and electrically coupled to the extension via. A microelectromechanical systems (MEMS) substrate is bonded to the substrate. The MEMs substrate is vertically separated from the sensing electrode.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: April 26, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • Publication number: 20210070429
    Abstract: The present invention relates to a free propeller assembly structure and an aircraft structure has the free propeller assembly. The free propeller assembly structure has at least one free propeller assembly. Each of the at least one free propeller assembly has a circular shaft, a main rotor, a signal transmitting device, and a rotor blade assembly. The main rotor has a shaft hole and multiple blade mounting structures radially disposed. Each blade mounting structure is provided with a positioning recess for mounting a driving motor in each positioning recess. The signal transmitting device includes multiple signal transmitters that are able to transmit interpretable electronic signals or photonic signals. The rotor blade assembly includes at least two rotor blades.
    Type: Application
    Filed: September 25, 2020
    Publication date: March 11, 2021
    Inventors: Bao-Shen Liu, Yu-Chia Liu
  • Publication number: 20200361767
    Abstract: The present disclosure relates to a method of forming an integrated chip structure. The method includes forming a plurality of interconnect layers within a dielectric structure over a substrate. A dielectric layer arranged along a top of the dielectric structure is patterned to define a via hole exposing an uppermost one of the plurality of interconnect layers. An extension via is formed within the via hole and one or more conductive materials are formed over the dielectric layer and the extension via. The one or more conductive materials are patterned to define a sensing electrode over and electrically coupled to the extension via. A microelectromechanical systems (MEMS) substrate is bonded to the substrate. The MEMs substrate is vertically separated from the sensing electrode.
    Type: Application
    Filed: July 31, 2020
    Publication date: November 19, 2020
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • Publication number: 20200317506
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 10752497
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure has a plurality of interconnect layers disposed within a dielectric structure over a substrate. A passivation layer is over the dielectric structure. A sensing electrode and a bonding electrode have bottom surfaces directly contacting the passivation layer. A microelectromechanical systems (MEMS) substrate is vertically separated from the sensing electrode. The bonding electrode is electrically connected to the MEMs substrate and to one or more of the plurality of interconnect layers. An electrode extension via is configured to electrically connect the sensing electrode to one or more of the plurality of interconnect layers.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: August 25, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • Patent number: 10689247
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: June 23, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 10494252
    Abstract: The present disclosure provides a CMOS MEMS device. The CMOS MEMS device includes a first substrate, a second substrate, a first polysilicon and a second polysilicon. The second substrate includes a movable part and is located over the first substrate. The first polysilicon penetrates the second substrate and is adjacent to a first side of the movable part of the second substrate. The second polysilicon penetrates the second substrate and is adjacent to a second side of the movable part of the second substrate.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: December 3, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 10358339
    Abstract: The invention provides a micro-electro-mechanical device which is manufactured by a CMOS manufacturing process. The micro-electro-mechanical device includes a stationary unit, a movable unit, and a connecting member. The stationary unit includes a first capacitive sensing region and a fixed structure region. The movable unit includes a second capacitive sensing region and a proof mass, wherein the first capacitive sensing region and the second capacitive sensing region form a capacitor, and the proof mass region consists of a single material. The connecting member is for connecting the movable unit in a way to allow a relative movement of the movable unit with respect to the stationary unit.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: July 23, 2019
    Assignee: PIXART IMAGING INCORPORATION
    Inventors: Ming-Han Tsai, Yu-Chia Liu, Wei-Leun Fang