Patents by Inventor Yu-Chia Liu

Yu-Chia Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250072295
    Abstract: A method of fabricating a semiconductor device includes the following steps. A plurality of doped regions are formed in a substrate. A first dielectric layer is formed on the substrate. A plurality of first contacts and second contacts are formed in the first dielectric layer to be connected to the plurality of doped regions. A memory element is formed on the first dielectric layer. The memory element is electrically connected to the second contact. A second dielectric layer is formed on the first dielectric layer. The second dielectric layer surrounds the memory element. A conductive line is formed in the second dielectric layer. A top surface of the conductive line is at a same level as a top surface of the memory element, and the conductive line is electrically connected to the plurality of first contacts.
    Type: Application
    Filed: November 13, 2024
    Publication date: February 27, 2025
    Applicant: Winbond Electronics Corp.
    Inventors: Wen-Chia Ou, Chih-Chao Huang, Min-Chih Wei, Yu-Ting Chen, Chi-Ching Liu
  • Patent number: 12238893
    Abstract: A flow guiding device in an immersion-cooled chassis of a server comprises at least one deflector located above a chip on a mainboard in the chassis, each deflector comprises a first end for mounting to the mainboard above the chip and a second end inclined away from the mainboard. The first end is immersed in coolant, the second end is higher than the first end; the deflector further comprises a hollow part including multiple through holes for interrupting upward movement vapor bubbles generated by the hot chip, which reduces probability of the vapor bubbles escaping from the coolant liquid and the chassis. A liquid-cooled chassis having the flow guiding device is also disclosed.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: February 25, 2025
    Assignee: Fulian Precision Electronics (Tianjin) Co., LTD.
    Inventors: Sung Tsang, Tsung-Lin Liu, Yu-Chia Ting, Cheng-Yi Huang, Chia-Nan Pai
  • Patent number: 12134555
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Grant
    Filed: May 11, 2023
    Date of Patent: November 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 12077285
    Abstract: The present invention relates to a free propeller assembly structure and an aircraft structure has the free propeller assembly. The free propeller assembly structure has at least one free propeller assembly. Each of the at least one free propeller assembly has a circular shaft, a main rotor, a signal transmitting device, and a rotor blade assembly. The main rotor has a shaft hole and multiple blade mounting structures radially disposed. Each blade mounting structure is provided with a positioning recess for mounting a driving motor in each positioning recess. The signal transmitting device includes multiple signal transmitters that are able to transmit interpretable electronic signals or photonic signals. The rotor blade assembly includes at least two rotor blades. One end of each rotor blade is connected with an open end of the positioning recesses of a corresponding one of the blade mounting structures.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: September 3, 2024
    Inventors: Bao-Shen Liu, Yu-Chia Liu
  • Publication number: 20230278856
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Application
    Filed: May 11, 2023
    Publication date: September 7, 2023
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 11667517
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: June 6, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 11312623
    Abstract: The present disclosure relates to a method of forming an integrated chip structure. The method includes forming a plurality of interconnect layers within a dielectric structure over a substrate. A dielectric layer arranged along a top of the dielectric structure is patterned to define a via hole exposing an uppermost one of the plurality of interconnect layers. An extension via is formed within the via hole and one or more conductive materials are formed over the dielectric layer and the extension via. The one or more conductive materials are patterned to define a sensing electrode over and electrically coupled to the extension via. A microelectromechanical systems (MEMS) substrate is bonded to the substrate. The MEMs substrate is vertically separated from the sensing electrode.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: April 26, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • Publication number: 20210070429
    Abstract: The present invention relates to a free propeller assembly structure and an aircraft structure has the free propeller assembly. The free propeller assembly structure has at least one free propeller assembly. Each of the at least one free propeller assembly has a circular shaft, a main rotor, a signal transmitting device, and a rotor blade assembly. The main rotor has a shaft hole and multiple blade mounting structures radially disposed. Each blade mounting structure is provided with a positioning recess for mounting a driving motor in each positioning recess. The signal transmitting device includes multiple signal transmitters that are able to transmit interpretable electronic signals or photonic signals. The rotor blade assembly includes at least two rotor blades.
    Type: Application
    Filed: September 25, 2020
    Publication date: March 11, 2021
    Inventors: Bao-Shen Liu, Yu-Chia Liu
  • Publication number: 20200361767
    Abstract: The present disclosure relates to a method of forming an integrated chip structure. The method includes forming a plurality of interconnect layers within a dielectric structure over a substrate. A dielectric layer arranged along a top of the dielectric structure is patterned to define a via hole exposing an uppermost one of the plurality of interconnect layers. An extension via is formed within the via hole and one or more conductive materials are formed over the dielectric layer and the extension via. The one or more conductive materials are patterned to define a sensing electrode over and electrically coupled to the extension via. A microelectromechanical systems (MEMS) substrate is bonded to the substrate. The MEMs substrate is vertically separated from the sensing electrode.
    Type: Application
    Filed: July 31, 2020
    Publication date: November 19, 2020
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • Publication number: 20200317506
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 10752497
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure has a plurality of interconnect layers disposed within a dielectric structure over a substrate. A passivation layer is over the dielectric structure. A sensing electrode and a bonding electrode have bottom surfaces directly contacting the passivation layer. A microelectromechanical systems (MEMS) substrate is vertically separated from the sensing electrode. The bonding electrode is electrically connected to the MEMs substrate and to one or more of the plurality of interconnect layers. An electrode extension via is configured to electrically connect the sensing electrode to one or more of the plurality of interconnect layers.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: August 25, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • Patent number: 10689247
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: June 23, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 10494252
    Abstract: The present disclosure provides a CMOS MEMS device. The CMOS MEMS device includes a first substrate, a second substrate, a first polysilicon and a second polysilicon. The second substrate includes a movable part and is located over the first substrate. The first polysilicon penetrates the second substrate and is adjacent to a first side of the movable part of the second substrate. The second polysilicon penetrates the second substrate and is adjacent to a second side of the movable part of the second substrate.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: December 3, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 10358339
    Abstract: The invention provides a micro-electro-mechanical device which is manufactured by a CMOS manufacturing process. The micro-electro-mechanical device includes a stationary unit, a movable unit, and a connecting member. The stationary unit includes a first capacitive sensing region and a fixed structure region. The movable unit includes a second capacitive sensing region and a proof mass, wherein the first capacitive sensing region and the second capacitive sensing region form a capacitor, and the proof mass region consists of a single material. The connecting member is for connecting the movable unit in a way to allow a relative movement of the movable unit with respect to the stationary unit.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: July 23, 2019
    Assignee: PIXART IMAGING INCORPORATION
    Inventors: Ming-Han Tsai, Yu-Chia Liu, Wei-Leun Fang
  • Patent number: 10273148
    Abstract: Some embodiments of the present disclosure provide a microelectromechanical systems (MEMS). The MEMS includes a semiconductive block. The semiconductive block includes a protruding structure. The protruding structure includes a bottom surface. The semiconductive block includes a sensing structure. A semiconductive substrate includes a conductive region. The conductive region includes a first surface under the sensing structure. The first surface is substantially coplanar with the bottom surface. A dielectric region includes a second surface not disposed over the first surface.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Chia-Hua Chu, Nien-Tsung Tsai, Yao-Te Huang, Li-Min Hung, Yu-Chia Liu
  • Patent number: 10273144
    Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) package having two MEMS devices with different pressures, and an associated method of formation. In some embodiments, the (MEMS) package includes a device substrate and a cap substrate bonded together. The device substrate includes a first trench and a second trench. A first MEMS device is disposed over the first trench and a second MEMS device is disposed over the second trench. A first stopper is raised from a first trench bottom surface of the first trench but below a top surface of the device substrate and a second stopper is raised from a second trench bottom surface of the second trench but below the top surface of the device substrate. A first depth of the first trench is greater than a second depth of the second trench.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Kuei-Sung Chang, Jung-Huei Peng
  • Publication number: 20190112183
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure has a plurality of interconnect layers disposed within a dielectric structure over a substrate. A passivation layer is over the dielectric structure. A sensing electrode and a bonding electrode have bottom surfaces directly contacting the passivation layer. A microelectromechanical systems (MEMS) substrate is vertically separated from the sensing electrode. The bonding electrode is electrically connected to the MEMs substrate and to one or more of the plurality of interconnect layers. An electrode extension via is configured to electrically connect the sensing electrode to one or more of the plurality of interconnect layers.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • Patent number: 10202278
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a cavity disposed in a substrate and enclosed by a first surface and a second surface opposite to the first surface. The semiconductor structure also includes a first electrode pair having a first electrode on the first surface and a second electrode on the second surface. The first electrode pair is configured to measure a first spacing between the first surface and the second surface. The semiconductor structure further includes a second electrode pair having a third electrode on the first surface and a fourth electrode on the second surface. The second electrode pair is configured to measure a second spacing between the first surface and the second surface.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: February 12, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jung-Huei Peng, Yi-Chien Wu, Yu-Chia Liu, Chun-Wen Cheng
  • Patent number: 10160639
    Abstract: The present disclosure relates to a semiconductor structure for a MEMS device. In some embodiments, the structure includes an interlayer dielectric (ILD) region positioned over a substrate. Further the structure includes an inter-metal dielectric region. The IMD region includes a passivation layer overlying a stacked structure. The stacked structure includes dielectric layers and etch stop layers that are stacked in an alternating fashion. Metal wire layers are disposed within the stacked structure of the IMD region. The structure also includes a sensing electrode electrically connected to the IMD region with an electrode extension via. The structure includes a MEMS substrate comprising a MEMS device having a soft mechanical structure positioned adjacent to the sensing electrode.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • Publication number: 20180201499
    Abstract: The invention provides a micro-electro-mechanical device which is manufactured by a CMOS manufacturing process. The micro-electro-mechanical device includes a stationary unit, a movable unit, and a connecting member. The stationary unit includes a first capacitive sensing region and a fixed structure region. The movable unit includes a second capacitive sensing region and a proof mass, wherein the first capacitive sensing region and the second capacitive sensing region form a capacitor, and the proof mass region consists of a single material. The connecting member is for connecting the movable unit in a way to allow a relative movement of the movable unit with respect to the stationary unit.
    Type: Application
    Filed: March 6, 2018
    Publication date: July 19, 2018
    Inventors: Ming-Han Tsai, Yu-Chia Liu, Wei-Leun Fang