Abstract: An embodiment is a device including a first die and a substrate including a first surface and a second surface opposite the first surface. The device also includes an active device on the first surface of the substrate. The device also includes a first interconnect structure on the first surface of the substrate. The device also includes a through substrate via extending through the first interconnect structure and the substrate to the second surface of the substrate, the through substrate via being electrically coupled to metallization patterns in the first interconnect structure. The device also includes one or more material-filled trench structures extending from the second surface of the substrate into the substrate, the one or more material-filled trench structures being electrically isolated from the through substrate via.

Abstract: A method of fabricating a contact structure includes the following steps. An opening is formed in a dielectric layer. A conductive material layer is formed within the opening and on the dielectric layer, wherein the conductive material layer includes a bottom section having a first thickness and a top section having a second thickness, the second thickness is greater than the first thickness. A first treatment is performed on the conductive material layer to form a first oxide layer on the bottom section and on the top section of the conductive material layer. A second treatment is performed to remove at least portions of the first oxide layer and at least portions of the conductive material layer, wherein after performing the second treatment, the bottom section and the top section of the conductive material layer have substantially equal thickness.

Abstract: A method includes forming a device die including forming integrated circuits on a semiconductor substrate; and forming a thermally conductive pillar extending into the semiconductor substrate. A cooling medium is attached over and contacting the semiconductor substrate to form a package, wherein the cooling medium is thermally coupled to the thermally conductive pillar.

Abstract: A method includes receiving a workpiece including a device layer disposed on a frontside of the workpiece, forming a frontside interconnect structure over the device layer, attaching a carrier substrate over the frontside interconnect structure, and etching from a backside of the workpiece to form first trenches and second trenches. The first trenches extend partially into the carrier substrate for a distance less than the second trenches. The method also includes forming a plurality of first conductive features in the first trenches and a plurality of second conductive features in the second trenches, forming a backside interconnect structure covering the first conductive features and the second conductive features, and thinning the carrier substrate from the frontside of the workpiece to expose the second conductive features. The first conductive features remain partially embedded in the carrier substrate.

Abstract: Interconnect structures for front-to-front stacked chips/dies and methods of fabrication thereof are disclosed herein. An exemplary system on integrated circuit (SoIC) includes a first die that is front-to-front bonded with a second die, for example, by bonding a first topmost metallization layer of a first frontside multilayer interconnect of the first die to a second topmost metallization layer of a second frontside multilayer interconnect of the second die. A through via extends partially through the first frontside multilayer interconnect of the first die, through a device layer of the first die, through a backside power rail of the first die, and through a carrier substrate. The backside power rail is between the carrier substrate and the device layer, and the backside power rail may be a portion of a backside multilayer interconnect of the first die. The through via may be connected to a redistribution layer (RDL) structure.

Abstract: A method includes forming a first multilayer interconnect structure over a first side of a device layer, forming a first portion of a second multilayer interconnect structure under a second side of the device layer, forming a trench that extends through the second dielectric layer, the device layer, and the first dielectric layer, forming a conductive structure in the trench, and forming a second portion of the second multilayer interconnect structure under the first portion of the second multilayer interconnect structure. The second portion of the second multilayer interconnect structure includes patterned metal layers disposed in a third dielectric layer, and wherein one or more of the patterned metal layers are in electrical connection with the conductive structure.

Abstract: A laser processing method and a laser processing system are provided. The laser processing method includes: irradiating a processing area of a workpiece with an electromagnetic wave; and after irradiating the processing area of the workpiece with the electromagnetic wave, irradiating the processing area of the workpiece with a processing pulse.

Abstract: Disclosed is a pharmaceutical composition for treating chronic obstructive pulmonary disease, comprising an effective amount of human mesenchymal stem cells, human serum albumin, and a pharmaceutically acceptable carrier or diluent. Also disclosed is a method for treating chronic obstructive pulmonary disease in a subject in need thereof, the method comprising administering to the subject a pharmaceutical composition comprising an effective amount of human mesenchymal stem cells, human serum albumin, and a pharmaceutically acceptable carrier or diluent.

Abstract: The present disclosure provides solutions to probing an interface. With a noninvasive measuring device provided in one embodiment of the disclosure, an acoustic wave whose frequency is higher than approximately 300 GHz is generated to propagate in a buffering film. With measuring the reflection from the interface of an object to be measured interfacing with the buffering film, it is possible in one embodiment of the disclosure that at least one physical property of the interface may be analyzed, preferably with approximately 0.3 nm resolution.

Abstract: The present disclosure provides solutions to probing an interface. With a noninvasive measuring device provided in one embodiment of the disclosure, an acoustic wave whose frequency is higher than approximately 300 GHz is generated to propagate in a buffering film. With measuring the reflection from the interface of an object to be measured interfacing with the buffering film, it is possible in one embodiment of the disclosure that at least one physical property of the interface may be analyzed, preferably with approximately 0.3 nm resolution.

Abstract: The present disclosure provides solutions to probing an interface. With a noninvasive measuring device provided in one embodiment of the disclosure, an acoustic wave whose frequency is higher than approximately 300 GHz is generated to propagate in a buffering film. With measuring the reflection from the interface of an object to be measured interfacing with the buffering film, it is possible in one embodiment of the disclosure that at least one physical property of the interface may be analyzed, preferably with approximately 0.3 nm resolution.