Patents by Inventor Yu-Chih Chen

Yu-Chih Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12114411
    Abstract: A target droplet source for an extreme ultraviolet (EUV) source includes a droplet generator configured to generate target droplets of a given material. The droplet generator includes a nozzle configured to supply the target droplets in a space enclosed by a chamber. In some embodiments, a nozzle tube is arranged within the nozzle of the droplet generator, and the nozzle tube includes a structured nozzle pattern configured to provide an angular momentum to the target droplets.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: October 8, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Huan Chen, Yu-Chih Huang, Ming-Hsun Tsai, Shang-Chieh Chien, Heng-Hsin Liu
  • Patent number: 12111582
    Abstract: A semiconductor substrate stage for carrying a substrate is provided. The semiconductor substrate stage includes a base layer, a magnetic shielding layer disposed on the base layer, a carrier layer disposed on the magnetic shielding layer, a receiver disposed on the carrier layer, a storage layer disposed between the base layer and the magnetic shielding layer, and a magnetic shielding element disposed on the carrier layer and surrounding the receiver.
    Type: Grant
    Filed: July 13, 2023
    Date of Patent: October 8, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Huan Chen, Yu-Chih Huang, Ya-An Peng, Shang-Chieh Chien, Li-Jui Chen, Heng-Hsin Liu
  • Publication number: 20240326046
    Abstract: A microfluidic purification device for exosomes purification is disclosed that has high speed, high viability and efficiency plus re-cycling of cells for regrowth of exosomes. The microfluidic purification device contains coarse filtering, and/or medium filtering plus fine filter with the medium/fine filter made of MEMS semiconductor process. For high-speed operation, an ultrasound vibrator attached to input chamber/filter/output chamber assembly is also used that the vibration amplitude, duty cycle and duration can be controlled through controller. The MEMS filter is V-shaped and/or funnel shape made of silicon wafer by semiconductor process. For funnel shape MEMS filter, the exit hole size is between 0.2 ?m to 1 ?m suitable for exosomes filtering with high speed and high viability.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 3, 2024
    Inventors: Wen-Chie HUANG, Chein-Hsun WANG, Y. H. CHEN, Chin-Hsiang CHANG, Jenping KU, Yu-Chih LIANG
  • Publication number: 20240327774
    Abstract: A microfluidic electroporation device for exogenous molecules transfection is disclosed. The microfluidic electroporation device includes an electroporation chamber assembly, an ultrasound vibrator, and a controller. The electroporation chamber assembly includes an input chamber for exogenous molecules, a MEMS filter, an activation chamber and a MEMS plate. The MEMS plate holds cells within individual cavity for electroporation. Both the MEMS filter and the MEMS plate are made of semiconductor process by wet etching and/or ICP dry etching with V-shaped cavities. The top surfaces of the MEMS filter and the MEMS plate are coated with metal layer for applying electric field during the electroporation process. The electroporation chamber assembly is attached to an ultrasound vibrator which is operated intermittently to allow cells to be fixed in the cavity of the MEMS plate during electroporation process and popped out for collection after electroporation process.
    Type: Application
    Filed: March 30, 2023
    Publication date: October 3, 2024
    Inventors: Wen-Chie HUANG, Chein-Hsun WANG, Y. H. CHEN, Chin-Hsiang CHANG, Jenping KU, Yu-Chih LIANG
  • Publication number: 20240321780
    Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution structure, and conductive vias. The molded semiconductor device comprises a sensor die with a first surface and a second surface opposite the first surface, wherein the sensor die has an input/output region and a sensing region at the first surface. The first redistribution structure is disposed on the first surface of the sensor die, wherein the first redistribution structure covers the input/output region and exposes the sensing region, and the first redistribution structure comprises a conductive layer having a redistribution pattern and a ring structure. The redistribution pattern is electrically connected with the sensor die. The ring structure surrounds the sensing region and is separated from the redistribution pattern, wherein the ring structure is closer to the sensing region than the redistribution pattern.
    Type: Application
    Filed: June 4, 2024
    Publication date: September 26, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chih Huang, Chih-Hao Chang, Po-Chun Lin, Chun-Ti Lu, Zheng-Gang Tsai, Shih-Wei Chen, Chia-Hung Liu, Hao-Yi Tsai, Chung-Shi Liu
  • Patent number: 12094946
    Abstract: A device includes a nanostructure, a gate dielectric layer, a gate electrode, and a gate contact. The nanostructure is over a substrate. The gate dielectric layer laterally surrounds the nanostructure. The gate electrode laterally surrounds the gate dielectric layer. The gate electrode has a bottom surface and a top surface both higher than a bottom end of the nanostructure. The gate electrode has a horizontal dimension decreasing from the bottom surface to the top surface. The gate contact is electrically coupled to the gate electrode.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: September 17, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yung-Chih Wang, Yu-Chieh Liao, Tai-I Yang, Hsin-Ping Chen
  • Publication number: 20240304511
    Abstract: A semiconductor package and a method of forming the same are provided. The semiconductor package includes a semiconductor die and a redistribution structure disposed on the semiconductor die. The redistribution structure includes an alignment auxiliary layer, a plurality of dielectric layers and a plurality of conductive patterns. The alignment auxiliary layer has a light transmittance for a light with a wavelength range of about 350-550 nm lower than that of one of the plurality of dielectric layers.
    Type: Application
    Filed: March 10, 2023
    Publication date: September 12, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Chih Chen, Yu-Hsiang Hu, Hung-Jui Kuo, Po-Han Wang, Hung-Chun Cho
  • Publication number: 20240304705
    Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.
    Type: Application
    Filed: May 16, 2024
    Publication date: September 12, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Publication number: 20240304394
    Abstract: This invention describes a packaging structure for roll-type (wound-type) aluminum conductive polymer capacitor element. Two protective substrates are applied to sandwich a roll-type capacitor element in between with an insulating material surrounding the capacitor element also in between the protective substrates. The protective substrates comprise electrically separated anodic conductive pad and cathodic conductive pad on their surfaces. The capacitor element is oriented with its axis perpendicular to the two substrates. The anodic and cathodic leads of the capacitor element pass through the through holes. An anodic external terminal is plated over the anodic conductive pad and a cathodic external terminal is plated over the cathodic conductive pad so that the anodic external terminal is electrically connected to the anodic lead and the cathodic external terminal is electrically connected to the cathodic lead.
    Type: Application
    Filed: January 12, 2024
    Publication date: September 12, 2024
    Inventors: Yu-Peng Chung, Chia-Wei Li, Wen Cheng Hsu, En-Ming Chen, Che-Chih Tsao
  • Publication number: 20240293536
    Abstract: The present invention relates to a porcine bivalent subunit vaccine composition in a single dose. The porcine bivalent subunit vaccine composition includes porcine bivalent antigen, CpG adjuvant and a dual phase adjuvant. The porcine bivalent antigen consists of a classical swine fever virus (CSFV)-E2 recombinant protein and a porcine circovirus type 2 (PCV2)-ORF2 recombinant protein, both of which are produced by a mammalian cell expression system. The porcine bivalent subunit vaccine composition in a single dose can confer effectively immune protection against CSFV and PCV2 via a single vaccination without boost vaccination.
    Type: Application
    Filed: December 22, 2023
    Publication date: September 5, 2024
    Applicant: National Pingtung University Of Science And Technology
    Inventors: Hso-Chi Chaung, Wen-Bin Chung, Yen-Li Huang, Chi-Chih Chen, Yu-Chieh Chen
  • Publication number: 20240274632
    Abstract: A semiconductor device includes a plurality of photodiodes, a semiconductor structure, a dielectric layer, a color filter layer, and a micro-lens. The semiconductor structure overlaps the photodiodes. The semiconductor structure includes a plurality of microstructures on a backside of the semiconductor structure. The dielectric layer is over the microstructures of the semiconductor structure. A thickness of the dielectric layer is less than a vertical distance from one of the photodiodes to one of the microstructures. The color filter layer is over the dielectric layer. The micro-lens is over the color filter layer.
    Type: Application
    Filed: April 25, 2024
    Publication date: August 15, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Nan TU, Yu-Lung YEH, Hsing-Chih LIN, Chien-Chang HUANG, Shih-Shiung CHEN
  • Publication number: 20240273675
    Abstract: An image calibration method is applied to an image calibration device includes an image receiver and an operation processor. The image calibration method of providing a motion deblur function includes driving a first camera to capture a first image having a first exposure time, driving a second camera disposed adjacent to the first camera to capture a second image having a second exposure time different from and at least partly overlapped with the first exposure time, and fusing a first feature of the first image and a second feature of the second image to generate a fusion image.
    Type: Application
    Filed: January 2, 2024
    Publication date: August 15, 2024
    Applicant: MEDIATEK INC.
    Inventors: Yu-Hua Huang, Pin-Wei Chen, Keh-Tsong Li, Shao-Yang Wang, Chia-Hui Kuo, Hung-Chih Ko, Yun-I Chou, Yen-Yang Chou, Chien-Ho Yu, Chi-Cheng Ju, Ying-Jui Chen
  • Publication number: 20240274461
    Abstract: A die bonding tool having a tool head including a plurality of openings fluidly coupled to a vacuum source to selectively secure a semiconductor die onto the tool head via the application of a suction force. The plurality of openings have non-uniform cross-sectional areas, including one or more first openings having a first cross-sectional area and one or more second openings having a second cross-sectional area that is greater than the first cross-section area. A first minimum offset distance between each of the first openings and any peripheral edge of the tool head is less than a second minimum offset distance between each of the second openings and any peripheral edge of the tool head. The configuration of the openings in the tool head may improve bonding of the semiconductor die to a substrate by inhibiting air becoming trapped between the semiconductor die and the substrate during the bonding process.
    Type: Application
    Filed: February 15, 2023
    Publication date: August 15, 2024
    Inventors: Chia-Yin CHEN, I-Chun HSU, Yu-Sheng LIN, Yan-Zuo TSAI, Yung-Chi LIN, Tsang-Jiuh WU, Wen-Chih CHIOU
  • Patent number: 12062635
    Abstract: Semiconductor device packages may include a first semiconductor device over a substrate and a second semiconductor device over the first semiconductor device. An active surface of the second semiconductor device may face away from the substrate. Conductors may extend from bond pads of the second semiconductor device, along surfaces of the second semiconductor device, first semiconductor device, and substrate to pads of routing members of the substrate. The conductors may be in contact with the bond pads and the routing members and a dielectric material interposed between the conductors and the first semiconductor device and between the conductors and the second semiconductor device. An encapsulant distinct from the dielectric material may cover the conductors, the first semiconductor device, the second semiconductor device, and an upper surface of the substrate. Methods of fabrication are also disclosed.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: August 13, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Po Chih Yang, Yu Jen Chen, Po Chen Kuo, Shih Wei Liang
  • Publication number: 20240265956
    Abstract: A memory chip includes a first decoding device and a memory device. The first decoding device is configured to generate multiple word line signals. The memory device is configured to generate a third data signal based on a first data signal and a second data signal. The memory device includes a first memory circuit and a second memory circuit. The first memory circuit is configured to generate the first data signal at a first node according to the word line signals during a first period. The second memory circuit is configured to generate the second data signal at a second node different from the first node according to the word line signals during a second period after the first period. A method of operating a memory chip is also disclosed herein.
    Type: Application
    Filed: April 15, 2024
    Publication date: August 8, 2024
    Inventors: Hsiang-Chi CHENG, Shyh-Bin KUO, Yi-Cheng LAl, Chung-Hung CHEN, Shih-Hsien YANG, Yu-Chih WANG, Kuo-Hsiang CHEN
  • Patent number: 12057275
    Abstract: This invention describes a packaging structure for roll-type (wound-type) aluminum conductive polymer capacitor element. Two protective substrates are applied to sandwich a roll-type capacitor element in between with an insulating material surrounding the capacitor element also in between the protective substrates. The protective substrates comprise electrically separated anodic conductive pad and cathodic conductive pad on their surfaces and through holes that pass through the conductive pads. The capacitor element is oriented with its axis perpendicular to the two substrates. The anodic and cathodic leads of the capacitor element pass through the through holes. An anodic external terminal is plated over the anodic conductive pad and a cathodic external terminal is plated over the cathodic conductive pad so that the anodic external terminal is electrically connected to the anodic lead and the cathodic external terminal is electrically connected to the cathodic lead.
    Type: Grant
    Filed: November 22, 2022
    Date of Patent: August 6, 2024
    Inventors: Yu-Peng Chung, Chia-Wei Li, Wen Cheng Hsu, En-Ming Chen, Che-Chih Tsao
  • Patent number: 12051646
    Abstract: A method comprises forming a first conductive line and a second conductive line in a first dielectric layer over a substrate, each having a planar top surface, applying an etch-back process to the first dielectric layer until a dielectric portion between the first conductive line and the second conductive line has been removed, and the first conductive line and the second conductive line have respective cross sectional shapes including a rounded surface and two rounded corners and depositing a second dielectric layer over the substrate, while leaving a first air gap between the first conductive line and the second conductive line.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: July 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiang-Lun Kao, Hsiang-Wei Liu, Tai-I Yang, Jian-Hua Chen, Yu-Chieh Liao, Yung-Chih Wang, Tien-Lu Lin
  • Publication number: 20240243047
    Abstract: A semiconductor package includes a semiconductor component, a package body, a first RDL structure and an insulation layer. The package body surrounds the semiconductor component and has a first package surface. The first RDL structure is formed on the first package surface of the package body. The insulation layer is formed on the first RDL structure and includes an insulation body, a plurality of recessed portions and a plurality of voids, wherein the insulation body has a first insulation surface, the recessed portions are recessed with respect to the first insulation surface and form a pattern, and the voids are embedded in the insulation body.
    Type: Application
    Filed: January 17, 2023
    Publication date: July 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chun Cho, Wei-Chih Chen, Po-Han Wang, Yu-Hsiang Hu, HUNG-JUI KUO
  • Patent number: 12039943
    Abstract: A backlight control device for use in an electronic device includes a motion detecting unit, a sound matching unit and a controller. The motion detecting unit is configured to detect motion of a lid section of the electronic device to generate motion data. The sound matching unit is configured to match a soundprint derived from a sound sample that is captured by a sound capture unit, to one or more sound patterns stored within in a sound pattern database to generate a lid state indication signal if the motion data indicates the motion of the lid section corresponds to a predetermined state. The controller is configured to control a backlight module of a display device of the electronic device according to the lid state indication signal.
    Type: Grant
    Filed: October 18, 2023
    Date of Patent: July 16, 2024
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Keng-Chih Chen, Yu-Chun Huang
  • Publication number: 20230378096
    Abstract: An electronic device is provided. The electronic device includes a substrate, a first conductive layer, an insulating layer, and a second conductive layer. The first conductive layer is disposed on the substrate. The first conductive layer has a first connection wire and a second connection wire. In a cycle, the first connection wire transmits a positive polarity signal and the second connection wire transmits a negative polarity signal. The insulating layer is disposed on the first conductive layer. The second conductive layer is disposed on the insulating layer. The second conductive layer includes a plurality of portions covering the first connection wire and the second connection wire. In addition, the number of first connection wire covered by each of the plurality of portions is equal to the number of second connection wire covered by each of the plurality of portions.
    Type: Application
    Filed: April 13, 2023
    Publication date: November 23, 2023
    Inventors: Yu-Chih CHEN, Nai-Hsuan CHENG, Shao-Hong CHEN