Abstract: Provided is a laminate that may exhibit thermally stable hydrophilicity, and a coating composition that may be used for such a laminate. A laminate according to one embodiment of the present disclosure includes: a substrate; a first layer disposed on at least one surface of the substrate, the first layer including a binder and an inorganic nanoparticle; and a hydrophilic second layer disposed on the first layer, the binder containing a cured product of a binder precursor containing 30 mass % or greater of a tri- or higher functional (meth)acrylate monomer relative to a total amount of the binder, and the inorganic nanoparticle having a (meth)acryloyl group.

Abstract: A method and apparatus for performing access management of a memory device in a Host Performance Booster (HPB) architecture with aid of device side table information encoding and decoding are provided. The method may include: encoding internal information of the memory device and sending encoded result thereof to a host device, to allow the host device to store the encoded result in a memory within the host device as host-owned encoded device side table information at the host device; generating and storing multiple entries of address mapping control table into a RAM as at least one portion of device side table information at the memory device; decoding partial information of the host-owned encoded device side table information, performing checking operation on decoded result thereof, and selectively using the decoded result to determine physical address associated with logical address; and reading data from the NV memory according to the physical address.

Abstract: A method and apparatus for performing access management of a memory device in a Host Performance Booster (HPB) architecture with aid of device side table information encoding and decoding are provided. The method may include: encoding internal information of the memory device and sending encoded result thereof to a host device, to allow the host device to store the encoded result in a memory within the host device as host-owned encoded device side table information at the host device; generating and storing multiple entries of address mapping control table into a RAM as at least one portion of device side table information at the memory device; decoding partial information of the host-owned encoded device side table information, performing checking operation on decoded result thereof, and selectively using the decoded result to determine physical address associated with logical address; and reading data from the NV memory according to the physical address.

Abstract: A method and apparatus for performing access management of a memory device in a Host Performance Booster (HPB) architecture with aid of device side table information encoding and decoding are provided. The method may include: encoding internal information of the memory device and sending encoded result thereof to a host device, to allow the host device to store the encoded result in a memory within the host device as host-owned encoded device side table information at the host device; generating and storing multiple entries of address mapping control table into a RAM as at least one portion of device side table information at the memory device; decoding partial information of the host-owned encoded device side table information, performing checking operation on decoded result thereof, and selectively using the decoded result to determine physical address associated with logical address; and reading data from the NV memory according to the physical address.

Abstract: A method and apparatus for performing access management of a memory device in a Host Performance Booster (HPB) architecture with aid of device side table information encoding and decoding are provided. The method may include: encoding internal information of the memory device and sending encoded result thereof to a host device, to allow the host device to store the encoded result in a memory within the host device as host-owned encoded device side table information at the host device; generating and storing multiple entries of address mapping control table into a RAM as at least one portion of device side table information at the memory device; decoding partial information of the host-owned encoded device side table information, performing checking operation on decoded result thereof, and selectively using the decoded result to determine physical address associated with logical address; and reading data from the NV memory according to the physical address.

Abstract: A head-up display including a light source module, a spatial light modulator, an imaging screen group and a control unit is provided. The light source module is configured to project a light beam. The spatial light modulator is configured to modulate the light beam as a first image and a second image and project respective image lights of the first and second images. The imaging screen group is configured to reflect the image lights of the first and second images to the visible range of the user, such that the user can view the first and second images. The control unit is coupled to the spatial light modulator to input at least two modulation signals to control the beam-splitting mechanism of the spatial light modulator.

Abstract: A method and associated apparatus for performing access management of a memory device with aid of dedicated bit information are provided. The method includes: transmitting a compact hybrid table comprising multiple compressed tables to a host device, for being stored in the host device, to allow the host device to send one of multiple compact hybrid table entries of the compact hybrid table to the memory device as reading reference; determining a starting logical address and a data length according to a read command packet from the host device, and determining a first mapping relationship and the dedicated bit information according to the read command packet; determining second mapping relationship(s) according to the first mapping relationship and the dedicated bit information; and reading the data from the NV memory for the host device at least according to the first mapping relationship and the second mapping relationship(s).

Abstract: Compositions including photoreactive and cleavable probes and methods of using the probes. The probes may include a tag conjugatable to a label, a cleavable linker linkable to a bait molecule, and a light-activated warhead. The compositions and methods may be useful for analyzing biomolecules.

Abstract: A head-up display capable of adjusting an imaging position is provided. The head-up display includes an image generation module, a reflector, a holographic diffraction optical element and a control unit. The image generation module is configured to display and project an image. The reflector is configured to reflect the image and further project the image on a transparent screen through the reflector. The holographic diffraction optical element is disposed on the transparent screen to reflect the image to a visible range of the user's eyes. The control unit is coupled to the reflector or the transparent screen to adjust the viewing angle of the holographic diffraction optical element having a pre-determined angle with the reflector.

Abstract: A method and associated apparatus for performing access management of a memory device with aid of dedicated bit information are provided. The method includes: transmitting a compact hybrid table comprising multiple compressed tables to a host device, for being stored in the host device, to allow the host device to send one of multiple compact hybrid table entries of the compact hybrid table to the memory device as reading reference; determining a starting logical address and a data length according to a read command packet from the host device, and determining a first mapping relationship and the dedicated bit information according to the read command packet; determining second mapping relationship(s) according to the first mapping relationship and the dedicated bit information; and reading the data from the NV memory for the host device at least according to the first mapping relationship and the second mapping relationship(s).

Abstract: A method and associated apparatus for performing access management of a memory device with aid of dedicated bit information are provided. The method includes: transmitting a compact hybrid table comprising multiple compressed tables to a host device, for being stored in the host device, to allow the host device to send one of multiple compact hybrid table entries of the compact hybrid table to the memory device as reading reference; determining a starting logical address and a data length according to a read command packet from the host device, and determining a first mapping relationship and the dedicated bit information according to the read command packet; determining second mapping relationship(s) according to the first mapping relationship and the dedicated bit information; and reading the data from the NV memory for the host device at least according to the first mapping relationship and the second mapping relationship(s).

Abstract: The present invention provides a method for accessing a flash memory module, wherein the flash memory module includes at least one flash memory chip, each flash memory chip includes a plurality of blocks, each clock includes a plurality of pages, and the method includes the steps of: providing a read-retry table, wherein the read-retry table includes a plurality of read setting levels, each read setting level corresponds to at least one read voltage, and no two read setting levels have the same read voltage; establishing a read success recording table, which records at least one specific read setting level that was previously used to successfully read the flash memory module; and when it is required to the read the flash memory module, using the at least one specific read setting level recorded in the read success recording table to read the flash memory module.

Abstract: A method and associated apparatus for performing access management of a memory device with aid of dedicated bit information are provided. The method includes: transmitting a compact hybrid table comprising multiple compressed tables to a host device, for being stored in the host device, to allow the host device to send one of multiple compact hybrid table entries of the compact hybrid table to the memory device as reading reference; determining a starting logical address and a data length according to a read command packet from the host device, and determining a first mapping relationship and the dedicated bit information according to the read command packet; determining second mapping relationship(s) according to the first mapping relationship and the dedicated bit information; and reading the data from the NV memory for the host device at least according to the first mapping relationship and the second mapping relationship(s).

Abstract: A head-up display capable of adjusting an imaging position is provided. The head-up display includes an image generation module, a reflector, a holographic diffraction optical element and a control unit. The image generation module is configured to display and project an image. The reflector is configured to reflect the image and further project the image on a transparent screen through the reflector. The holographic diffraction optical element is disposed on the transparent screen to reflect the image to a visible range of the user's eyes. The control unit is coupled to the reflector or the transparent screen to adjust the viewing angle of the holographic diffraction optical element having a pre-determined angle with the reflector.

Abstract: The present invention provides a method for accessing a flash memory module, wherein the flash memory module includes at least one flash memory chip, each flash memory chip includes a plurality of blocks, each clock includes a plurality of pages, and the method includes the steps of: providing a read-retry table, wherein the read-retry table includes a plurality of read setting levels, each read setting level corresponds to at least one read voltage, and no two read setting levels have the same read voltage; establishing a read success recording table, which records at least one specific read setting level that was previously used to successfully read the flash memory module; and when it is required to the read the flash memory module, using the at least one specific read setting level recorded in the read success recording table to read the flash memory module.

Abstract: A head-up display including a light source module, a spatial light modulator, an imaging screen group and a control unit is provided. The light source module is configured to project a light beam. The spatial light modulator is configured to modulate the light beam as a first image and a second image and project respective image lights of the first and second images. The imaging screen group is configured to reflect the image lights of the first and second images to the visible range of the user, such that the user can view the first and second images. The control unit is coupled to the spatial light modulator to input at least two modulation signals to control the beam-splitting mechanism of the spatial light modulator.

Abstract: The present invention provides a flash memory controller, wherein the flash memory controller is arranged to access a flash memory module, the flash memory module includes a plurality of flash memory chips, the flash memory controller includes a buffer memory and a microcontroller, and the buffer memory is arranged to store an in-system programming (ISP) code. When the flash memory controller enters a power saving mode, the microcontroller disables a portion of the buffer memory to make at least one portion of the ISP code disappear; and when the flash memory controller enters a normal mode from the power saving mode, the microcontroller reads said at least one portion of the ISP code from N flash memory chips within the plurality of flash memory chips, wherein N is a positive integer greater than one.

Abstract: A method for defect inspection of a transparent substrate comprises utilizing a wavefront reconstruction unit to obtain complex defect diffraction wavefront of a transparent substrate; using a complex defect diffraction module to confirm the effective diffraction distance of the complex defect diffraction wavefront; utilizing a defect detection module to detect position of the defect of the transparent substrate; using a defect classification module to perform extraction, analysis and classification of diffraction characteristics and utilizing a machine learning algorithm or a deep learning algorithm to automatically identify the defects.

Abstract: The present invention provides a flash memory controller, wherein the flash memory controller is arranged to access a flash memory module, the flash memory module includes a plurality of flash memory chips, the flash memory controller includes a buffer memory and a microcontroller, and the buffer memory is arranged to store an in-system programming (ISP) code. When the flash memory controller enters a power saving mode, the microcontroller disables a portion of the buffer memory to make at least one portion of the ISP code disappear; and when the flash memory controller enters a normal mode from the power saving mode, the microcontroller reads said at least one portion of the ISP code from N flash memory chips within the plurality of flash memory chips, wherein N is a positive integer greater than one.

Abstract: A data storage device includes a flash memory and a controller. The flash memory is utilized to store at least one data. The controller is coupled to the flash memory to receive at least one read command transmitted from a host, and reads the data stored by the flash memory according to the read command. The controller determines whether or not the length of the read command is greater than a first predetermined value. If the length is greater than the first predetermined value, the controller arranges the read command on a sequential queue. If the length is not greater than the first predetermined value, the controller arranges the read command on a random queue. The controller executes the read command of the random queue at high priority.