Patents by Inventor Yu-Ching Cheng

Yu-Ching Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11976170
    Abstract: The present invention provides a polybenzoxazole precursor, which comprises a structure of formula (I): wherein the definitions of Y, Z, R1, i, j, and V are provided herein. By means of the polybenzoxazole precursor, the resin composition of the present invention is able to form a film with high frequency characteristics and high contrast.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: May 7, 2024
    Assignee: MICROCOSM TECHNOLOGY CO., LTD.
    Inventors: Steve Lien-chung Hsu, Yu-Ching Lin, Yu-Chiao Shih, Hou-Chieh Cheng
  • Publication number: 20240137709
    Abstract: An electro-acoustical transducer device is disclosed, which includes: a hollow disk body that generally defines an axis of propagation, the hollow disk body comprising: a pair of plate members extending substantially perpendicular to the axis of propagation, each provided with a central transmitting port arranged about the axis of propagation, and a peripheral enclosure jointing the pair of plate members at the respective outer edge portions thereof, thereby defining a chamber of resonance between the pair of plate members; wherein a ring-opening about the axis of propagation that enables access to the chamber of resonance is formed between the central transmitting ports of the plate members.
    Type: Application
    Filed: April 27, 2023
    Publication date: April 25, 2024
    Inventors: YU-CHEN CHEN, CHUN-KAI CHAN, HSU-HSIANG CHENG, MING-CHING CHENG
  • Patent number: 11967375
    Abstract: A memory device that includes at least one memory cell is introduced. Each of the at least one memory cell is coupled to a bit line and a word line. Each of the at least one memory cell includes a memory element and a selector element, in which the memory element is configured to store data of the at least one memory cell. The selector element is coupled to the memory element in series and is configured to select the memory element for a read operation and amplify the data stored in the memory element in the read operation.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Li Chiang, Chao-Ching Cheng, Tzu-Chiang Chen, Yu-Sheng Chen, Hon-Sum Philip Wong
  • Patent number: 11963369
    Abstract: The present disclosure relates to an integrated circuit. The integrated circuit has a plurality of bit-line stacks disposed over a substrate and respectively including a plurality of bit-lines stacked onto one another. A data storage structure is over the plurality of bit-line stacks and a selector is over the data storage structure. A word-line is over the selector. The selector is configured to selectively allow current to pass between the plurality of bit-lines and the word-line. The plurality of bit-line stacks include a first bit-line stack, a second bit-line stack, and a third bit-line stack. The first and third bit-line stacks are closest bit-line stacks to opposing sides of the second bit-line stack. The second bit-line stack is separated from the first bit-line stack by a first distance and is further separated from the third bit-line stack by a second distance larger than the first distance.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Li Chiang, Chao-Ching Cheng, Jung-Piao Chiu, Tzu-Chiang Chen, Yu-Sheng Chen
  • Publication number: 20240090230
    Abstract: A memory array and an operation method of the memory array are provided. The memory array includes first and second ferroelectric memory devices formed along a gate electrode, a channel layer and a ferroelectric layer between the gate electrode and the channel layer. The ferroelectric memory devices include: a common source/drain electrode and two respective source/drain electrodes, separately in contact with a side of the channel layer opposite to the ferroelectric layer, wherein the common source/drain electrode is disposed between the respective source/drain electrodes; and first and second auxiliary gates, capacitively coupled to the channel layer, wherein the first auxiliary gate is located between the common source/drain electrode and one of the respective source/drain electrodes, and the second auxiliary gate is located between the common source/drain electrode and the other respective source/drain electrode.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Ling Lu, Chen-Jun Wu, Ya-Yun Cheng, Sheng-Chih Lai, Yi-Ching Liu, Yu-Ming Lin, Feng-Cheng Yang, Chung-Te Lin
  • Patent number: 11808953
    Abstract: A microlens array device includes a substrate and a microlens array. The microlens array is disposed on the substrate and includes a plurality of first lenses and a plurality of second lenses. Each of the first lenses is used to project a first pattern on a far field. Each of the second lenses is used to project a second pattern on the far field. The first pattern has a first area on the far field. The second pattern has a second area on the far field. The first area is different from the second area. One of the two patterns is completely overlapped on the other one of the two patterns.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: November 7, 2023
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventor: Yu-Ching Cheng
  • Patent number: 11466836
    Abstract: The optical apparatus includes a first light source, a second light source, and at least one lens unit. An incident surface of the lens unit faces the first light source and the second light source. The normal vector of a first emitting surface of the first light source is tilted toward a first direction opposite to the second light source. The normal vector of a second emitting surface of the second light source is tilted toward a second direction opposite to the first light source. The first direction is opposite to the second direction such that an angle is formed between the normal vector of the first emitting surface and the normal vector of the second emitting surface. The angle is greater than 0 degree and less than or equal to 90 degrees.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: October 11, 2022
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventor: Yu-Ching Cheng
  • Publication number: 20220128741
    Abstract: A microlens array device includes a substrate and a microlens array. The microlens array is disposed on the substrate and includes a plurality of first lenses and a plurality of second lenses. Each of the first lenses is used to project a first pattern on a far field. Each of the second lenses is used to project a second pattern on the far field. The first pattern has a first area on the far field. The second pattern has a second area on the far field. The first area is different from the second area. One of the two patterns is completely overlapped on the other one of the two patterns.
    Type: Application
    Filed: October 27, 2020
    Publication date: April 28, 2022
    Inventor: Yu-Ching Cheng
  • Patent number: 11085609
    Abstract: An illumination device including a light source array and a microlens array is provided. The light source array includes a plurality of light sources arranged in an array. The microlens array includes a plurality of microlenses arranged in an array. The illumination device satisfies the following conditional expressions so as to produce structured light: z=z0+dz and z0=(m/2)*(P2/?), where z is a distance between the light source array and the microlens array along a central axis of the microlens array, P is a lens pitch of the microlens array, ? is a wavelength of the light sources, m is an integer and m? is a non-integer number. The illumination device satisfies 1%?dz/z0?5% or ?5%?dz/z0??1%.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: August 10, 2021
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventor: Yu-Ching Cheng
  • Publication number: 20060083639
    Abstract: A PDMS valve-less micro pump structure includes a PDMS body having a contour surface, a membrane covering the contour surface of the PDMS body, and a PZT actuator located on the membrane. The contour surface of the PDMS body to be sealed by the membrane and the PZT actuator has in series a lead-in cavity, a lead-in nozzle structure, a main cavity, a lead-out nozzle structure, and a lead-out cavity. The PZT actuator is located right above the main cavity. By providing the PDMS as a material to form the body of the micro pump, the micro pump can then be mass-produced with less cost and simpler structuring. Also, substantial elasticity and bio-compatibility for the micro pump can be achieved.
    Type: Application
    Filed: January 26, 2005
    Publication date: April 20, 2006
    Inventors: Min-Sheng Liu, Chi-Chuan Wang, Bing-Chwen Yang, Yu-Ching Cheng, Wen-Jeng Chang