Abstract: An ultra-wideband antenna device includes a radiation metal body, a first slotted hole, a second slotted hole, a third slotted hole, a fourth slotted hole, a ground point, and a feeding source. The radiation metal body includes a first side edge and a second side edge opposite to each other and a third side edge and a fourth side edge opposite to each other, the first slotted hole extends inward from the first side edge, the second slotted hole extends inward from the second side edge, the third slotted hole extends inward from the third side edge, and the fourth slotted hole extends inward from the fourth side edge. The ground point is located at a middle position of the radiation metal body, and the feeding source is located on the radiation metal body and away from the middle position.

Abstract: An ultra-wideband antenna device is disposed on a casing of an electronic device. The ultra-wideband antenna device includes radio frequency terminals, a first antenna module, a second antenna module, and a switch module. The radio frequency terminals, the first antenna module and the switch module are located in the casing. The first antenna module is located on a metal frame of the casing, and the first antenna module includes a first antenna. The second antenna module includes a second antenna, a third antenna, and a fourth antenna. The switch module is connected between the radio frequency terminals and the first antenna module. When the switch module turns on one of the radio frequency terminals and the first antenna for distance measurement, the switch module selectively turns on at least one of the second antenna, the third antenna, or the fourth antenna.

Abstract: An ultra-wideband antenna device includes a radiation metal body, a first slotted hole, a second slotted hole, a third slotted hole, a fourth slotted hole, a ground point, and a feeding source. The radiation metal body includes a first side edge and a second side edge opposite to each other and a third side edge and a fourth side edge opposite to each other, the first slotted hole extends inward from the first side edge, the second slotted hole extends inward from the second side edge, the third slotted hole extends inward from the third side edge, and the fourth slotted hole extends inward from the fourth side edge. The ground point is located at a middle position of the radiation metal body, and the feeding source is located on the radiation metal body and away from the middle position.

Abstract: Disclosed in the present invention is a system for forming a product package by online forming, filling and sealing, the system comprising: a sterilization apparatus, a forming apparatus, a conveyor belt, a filling apparatus and a first closing apparatus. Also disclosed is a method for forming a product package by online forming, filling and sealing. The method of the present invention integrates production and filling of large-volume packages, greatly shortening the supply chain and increasing production efficiency.

Abstract: Disclosed in the present invention is a system for forming a product package by online forming, filling and sealing, the system comprising: a sterilization apparatus, a forming apparatus, a conveyor belt, a filling apparatus and a first closing apparatus. Also disclosed is a method for forming a product package by online forming, filling and sealing. The method of the present invention integrates production and filling of large-volume packages, greatly shortening the supply chain and increasing production efficiency.

Abstract: A display panel includes a first substrate, first gate lines, first data lines, second data lines, third data lines, fourth data lines, first sub-pixels, second sub-pixels and first shielding electrodes. The first substrate has a plurality of first sub-pixel regions and second sub-pixel regions. The first gate lines extend along a first direction. The first data lines, the second data lines, the third data lines and the fourth data lines extend along a second direction and are sequentially arranged in the first direction. The first sub-pixel is electrically connected to one of the first data line and the second data line. The second sub-pixel is electrically connected to one of the third data line and the fourth data line. The first shielding electrodes extend along the second direction and are disposed in a common boundary between the first sub-pixel region and the second sub-pixel region adjacent to each other.

Abstract: A pixel structure including a first electrode layer, a second electrode layer and a liquid crystal layer is provided. The first electrode layer includes a plurality of first electrodes and a plurality of second electrodes, wherein the first electrodes are used for receiving a first driving voltage, and the second electrodes are used for receiving a second driving voltage. The second electrode layer includes a plurality of third electrodes and a plurality of fourth electrodes, wherein the third electrodes are used for receiving a third driving voltage and the fourth electrodes are used for receiving a fourth driving voltage. The liquid crystal layer is disposed between the first electrode layer and the second electrode layer. The first electrodes and the second electrodes are alternately disposed along a first direction parallel to the liquid crystal layer, and the third electrodes and the fourth electrodes are alternately disposed along the first direction.

Abstract: A pixel array includes pixel units. A gate of a sharing switch device is electrically connected to a signal line. A source of the sharing switch device is electrically connected to an active device and a sub-pixel electrode. A terminal of a first capacitance Cpp is electrically connected to the source of the sharing switch device and the sub-pixel electrode. Another terminal of the first capacitance Cpp is electrically connected to a main pixel electrode of the next pixel unit. A terminal of a second capacitance Ccc is electrically connected to a drain of the sharing switch device. Another terminal of the second capacitance Ccc is electrically connected to the main pixel electrode of the next pixel unit. 5%?(Ccc/Cpp)?25%.

Abstract: A pixel array includes a first color pixel unit, a second color pixel unit and a third pixel unit, and the first, second and third pixel units respectively include a scan line, a data line, an active device electrically connected to the scan line and the data line and a first pixel electrode electrically connected to the active device. The first pixel electrode has at least one first slit, and a first acute angle is formed between an extending direction of the first slit and an extending direction of the scan line. Any two of the first acute angle of the first color pixel unit, the first acute angle of the second color pixel unit, and the first acute angle of the third color pixel unit are different.

Abstract: A pixel array includes pixel units. A gate of a sharing switch device is electrically connected to a signal line. A source of the sharing switch device is electrically connected to an active device and a sub-pixel electrode. A terminal of a first capacitance Cpp is electrically connected to the source of the sharing switch device and the sub-pixel electrode. Another terminal of the first capacitance Cpp is electrically connected to a main pixel electrode of the next pixel unit. A terminal of a second capacitance Ccc is electrically connected to a drain of the sharing switch device. Another terminal of the second capacitance Ccc is electrically connected to the main pixel electrode of the next pixel unit. 5%?(Ccc/Cpp)?25%.

Abstract: A display panel includes a first substrate, first gate lines, first data lines, second data lines, third data lines, fourth data lines, first sub-pixels, second sub-pixels and first shielding electrodes. The first substrate has a plurality of first sub-pixel regions and second sub-pixel regions. The first gate lines extend along a first direction. The first data lines, the second data lines, the third data lines and the fourth data lines extend along a second direction and are sequentially arranged in the first direction. The first sub-pixel is electrically connected to one of the first data line and the second data line. The second sub-pixel is electrically connected to one of the third data line and the fourth data line. The first shielding electrodes extend along the second direction and are disposed in a common boundary between the first sub-pixel region and the second sub-pixel region adjacent to each other.

Abstract: A pixel structure including a first electrode layer, a second electrode layer and a liquid crystal layer is provided. The first electrode layer includes a plurality of first electrodes and a plurality of second electrodes, wherein the first electrodes are used for receiving a first driving voltage, and the second electrodes are used for receiving a second driving voltage. The second electrode layer includes a plurality of third electrodes and a plurality of fourth electrodes, wherein the third electrodes are used for receiving a third driving voltage and the fourth electrodes are used for receiving a fourth driving voltage. The liquid crystal layer is disposed between the first electrode layer and the second electrode layer. The first electrodes and the second electrodes are alternately disposed along a first direction parallel to the liquid crystal layer, and the third electrodes and the fourth electrodes are alternately disposed along the first direction.

Abstract: A pixel array includes a first color pixel unit, a second color pixel unit and a third pixel unit, and the first, second and third pixel units respectively include a scan line, a data line, an active device electrically connected to the scan line and the data line and a first pixel electrode electrically connected to the active device. The first pixel electrode has at least one first slit, and a first acute angle is formed between an extending direction of the first slit and an extending direction of the scan line. Any two of the first acute angle of the first color pixel unit, the first acute angle of the second color pixel unit, and the first acute angle of the third color pixel unit are different.

Abstract: A sub-pixel circuit, display panel and driving method of the display panel are provided. The display panel has a plurality of data lines, scan lines and sub-pixel circuits. At least one of the sub-pixel circuits is electrically coupled to one data line and three scan lines. The sub-pixel circuit determines whether to receive data from the coupled data line or not according to scan signals transmitted on the coupled three scan lines, and controls transmittance itself accordingly. Specifically, the scan signals transmitted on the coupled three scan lines are different from each other.

Abstract: A pixel array includes a first color pixel unit, a second color pixel unit and a third pixel unit, and the first, second and third pixel units respectively include a scan line, a data line, an active device electrically connected to the scan line and the data line and a first pixel electrode electrically connected to the active device. The first pixel electrode has at least one first slit, and a first acute angle is formed between an extending direction of the first slit and an extending direction of the scan line. Any two of the first acute angle of the first color pixel unit, the first acute angle of the second color pixel unit, and the first acute angle of the third color pixel unit are different.

Abstract: An LCD panel with color washout improvement. In one embodiment, the LCD panel includes a plurality of pixels spatially arranged in a matrix form, each pixel defined between a respective pair of scanning lines (Gn, Gn—CS) and two neighboring data lines Dm and Dm+1, comprising a pixel electrode, a first transistor electrically coupled to the scanning lines Gn, the date line Dm and the pixel electrode, and a second transistor electrically coupled to the scanning lines Gn—CS and the pixel electrode such that when N pairs of scanning signals to the N pairs of scanning lines {Gn, Gn—CS} and a plurality of data signals to the data lines, the pixel electrode of each pixel has a first voltage at the first duration of a frame period, and a second voltage at the second duration of the frame period, respectively. The first and second voltages are substantially different from each other.

Abstract: An exemplary pixel circuit and a flat display panel using the same are provided. The pixel circuit includes three sub-electrode control circuits. The sub-electrode control circuits are controlled by two scan lines to receive data transmitted from two data lines. One of the three sub-electrode control circuits adjusts stored data by charge sharing. Accordingly, a display control of the pixel circuit is achieved by the three sub-electrode control circuits.

Abstract: A pixel array including a plurality of scan lines, a plurality of data lines, and a plurality of sub-pixel is provided. Each of the sub-pixel arranged in the nth row includes a first switch, a second switch, a first pixel electrode, a second pixel electrode, and a third switch, wherein the first switch and the second switch are electrically connected to the nth scan line and the mth data line, the first pixel electrode is electrically connected to the first switch, the second pixel electrode is electrically connected to a signal output terminal of the second switch. The first pixel electrode has a first aperture above the signal output terminal. The third switch is electrically connected to the (n+1)th scan line and the second pixel electrode, and the second pixel electrode has a second aperture above a floating terminal of the third switch.

Abstract: A pixel array including a plurality of scan lines, data lines, and sub-pixels is provided. Each of the sub-pixels arranged in the nth row includes a first switch, a first pixel electrode, a second switch, a third switch, and a second pixel electrode. The first switch and the second switch are electrically connected to the nth scan line and the mth data line. The first switch and the first pixel electrode are electrically connected. The second switch has a first signal output terminal. The third switch is electrically connected to the (n+i)th scan line. The third switch has a signal input terminal electrically connected to the first signal output terminal and a second signal output terminal. The first signal output terminal is electrically insulated from the first pixel electrode and the second pixel electrode. The first signal output terminal extends to the underneath of the second pixel electrode.

Abstract: A pixel array includes a first color pixel unit, a second color pixel unit and a third pixel unit, and the first, second and third pixel units respectively include a scan line, a data line, an active device electrically connected to the scan line and the data line and a first pixel electrode electrically connected to the active device. The first pixel electrode has at least one first slit, and a first acute angle is formed between an extending direction of the first slit and an extending direction of the scan line. Any two of the first acute angle of the first color pixel unit, the first acute angle of the second color pixel unit, and the first acute angle of the third color pixel unit are different.