Patents by Inventor Yu-Chun Peng

Yu-Chun Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7448917
    Abstract: A connector for connecting a host and a peripheral device is disclosed. The connector includes N pin groups and each of the N pin groups has different pin length, wherein N is a positive integer and is greater than or equal to 3. The first pin group consists of ground pins and has the longest pin length.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: November 11, 2008
    Assignee: HTC Corporation
    Inventors: Yu-Jing Liao, Yao-Chung Lin, Yi-Tsung Cheng, Wei-Chih Chang, Yu-Chun Peng, Cheng-Hsi Liu
  • Publication number: 20070217451
    Abstract: A data transmission method and the transmission circuit thereof for transmitting data between a host and a peripheral apparatus are disclosed. The data transmission method includes the following steps. First, a clock signal is transmitted by a first pin. Then, a data signal is transmitted by a second pin according to the timing of the clock signal.
    Type: Application
    Filed: January 31, 2007
    Publication date: September 20, 2007
    Applicant: HIGH TECH COMPUTER, CORP.
    Inventors: Shih-Hung Chu, Hsun-Hsin Chuang, Yu-Chun Peng
  • Publication number: 20070218725
    Abstract: A connector for connecting a host and a peripheral device is disclosed. The connector includes N pin groups and each of the N pin groups has different pin length, wherein N is a positive integer and is greater than or equal to 3. The first pin group consists of ground pins and has the longest pin length.
    Type: Application
    Filed: January 10, 2007
    Publication date: September 20, 2007
    Applicant: HIGH TECH COMPUTER, CORP.
    Inventors: Yu-Jing Liao, Yao-Chung Lin, Yi-Tsung Cheng, Wei-Chih Chang, Yu-Chun Peng, Cheng-Hsi Liu
  • Patent number: 7248707
    Abstract: A plug detection circuit. The detected circuit is disposed in an electronics device with an earphone jack, accepting plugs with a plurality of conductive rings. The detection circuit has a plurality of pins, wherein a first pin detects, and outputs a first logic potential, and a second pin detects the potentials at the conductive rings and outputs a second logic potential. The detection circuit determines the type of earphone connected to the earphone jack.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: July 24, 2007
    Assignee: High Tech Computer Corp.
    Inventors: Yu-Chun Peng, Ching-Sung Ho, Su-Hong Tseng, Hsi-Cheng Yeh
  • Patent number: 7106304
    Abstract: A keypad device including a parallel/serial conversion device, a keypad module, and a controller coupled to the parallel/serial conversion device and the keypad module. The keys in the keypad module are arranged in parallel. After the key is triggered, an interrupt signal will be fed to the controller. On receiving the interrupt signal, the controller will feed a drive voltage to the keypad module generating a parallel signal therein. After causing the parallel/serial conversion device to read and store the parallel signal, the controller will be able to read the parallel signal serially by using the clock signals. The status of the keypad module can thereby be obtained.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: September 12, 2006
    Assignee: High Tech Computer Corp.
    Inventors: Yu-Chun Peng, Shao-Chun Ho, Hsi-Cheng Yeh, Chih-Ming Hsu
  • Patent number: 7095339
    Abstract: An apparatus for data input. The apparatus comprises a sensing circuit for a plurality of keys, outputting an interruption signal and a corresponding group of data bits when one of the keys is pressed, a shift register circuit receiving a strobe signal, a clock signal and the group of data bits in parallel from the sensing circuit when the strobe signal is asserted, and serially outputting the group of data bits in synchronization with the clock signal, and a microcontroller receiving the interruption signal, outputting the strobe signal and clock signal when the interruption signal is asserted, and serially receiving the group of data bits from the shift register circuit to identify the key being pressed.
    Type: Grant
    Filed: June 23, 2003
    Date of Patent: August 22, 2006
    Assignee: High Tech Computer Corp.
    Inventors: Yu-Chun Peng, Wen-Whah Tsai, Kuo-Bing Fang, Tzu-Hsun Tung
  • Patent number: 6999800
    Abstract: A method for power management of a smart phone. The method comprises steps of resetting the smart phone, searching for network service, operating the mobile phone system in standby mode and a PDA system in normal mode when connected to a network, switching the mobile phone system to connection mode when establishing communication with a remote terminal, switching the mobile phone system to sleep mode when the mobile phone system has been idle for a first time period, switching the PDA system to sleep mode when the PDA system has been idle for a second time period, and implementing power detection to switch the mobile phone and PDA system to off mode when the detected power is lower than a first and second threshold respectively.
    Type: Grant
    Filed: July 1, 2003
    Date of Patent: February 14, 2006
    Assignee: High Tech Computer Corp.
    Inventors: Yu-Chun Peng, Ching-Hsiang Chang, Tzu-Hsun Tung, Hsi-Cheng Yeh
  • Publication number: 20050090141
    Abstract: A plug detection circuit. The detected circuit is disposed in an electronics device with an earphone jack, accepting plugs with a plurality of conductive rings. The detection circuit has a plurality of pins, wherein a first pin detects, and outputs a first logic potential, and a second pin detects the potentials at the conductive rings and outputs a second logic potential. The detection circuit determines the type of earphone connected to the earphone jack.
    Type: Application
    Filed: July 30, 2003
    Publication date: April 28, 2005
    Inventors: Yu-Chun Peng, Ching-Sung Ho, Su-Hong Tseng, Hsi-Cheng Yeh
  • Publication number: 20040082362
    Abstract: A method for power management of a smart phone. The method comprises steps of resetting the smart phone, searching for network service, operating the mobile phone system in standby mode and a PDA system in normal mode when connected to a network, switching the mobile phone system to connection mode when establishing communication with a remote terminal, switching the mobile phone system to sleep mode when the mobile phone system has been idle for a first time period, switching the PDA system to sleep mode when the PDA system has been idle for a second time period, and implementing power detection to switch the mobile phone and PDA system to off mode when the detected power is lower than a first and second threshold respectively.
    Type: Application
    Filed: July 1, 2003
    Publication date: April 29, 2004
    Inventors: Yu-Chun Peng, Ching-Hsiang Chang, Tzu-Hsun Tung, Hsi-Cheng Yeh
  • Publication number: 20040083312
    Abstract: An apparatus for data input. The apparatus comprises a sensing circuit for a plurality of keys, outputting an interruption signal and a corresponding group of data bits when one of the keys is pressed, a shift register circuit receiving a strobe signal, a clock signal and the group of data bits in parallel from the sensing circuit when the strobe signal is asserted, and serially outputting the group of data bits in synchronization with the clock signal, and a microcontroller receiving the interruption signal, outputting the strobe signal and clock signal when the interruption signal is asserted, and serially receiving the group of data bits from the shift register circuit to identify the key being pressed.
    Type: Application
    Filed: June 23, 2003
    Publication date: April 29, 2004
    Inventors: Yu-Chun Peng, Wen-Whah Tsai, Kuo-Bing Fang, Tzu-Hsun Tung
  • Publication number: 20040075649
    Abstract: A keypad device including a parallel/serial conversion device, a keypad module, and a controller coupled to the parallel/serial conversion device and the keypad module. The keys in the keypad module are arranged in parallel. After the key is triggered, an interrupt signal will be fed to the controller. On receiving the interrupt signal, the controller will feed a drive voltage to the keypad module generating a parallel signal therein. After causing the parallel/serial conversion device to read and store the parallel signal, the controller will be able to read the parallel signal serially by using the clock signals. The status of the keypad module can thereby be obtained.
    Type: Application
    Filed: July 14, 2003
    Publication date: April 22, 2004
    Inventors: Yu-Chun Peng, Shao-Chun Ho, Hsi-Cheng Yeh, Chih-Ming Hsu
  • Patent number: 6722022
    Abstract: An apparatus and a method for calibrating the position of a wafer platform in an ion implanter, and particularly in a medium current ion implanter. The apparatus is constructed by a curvilinear piece formed in a half-circular shape, a pair of linear rods for supporting the curvilinear piece, and at least one cross-bracing rod connected in-between the pair of linear rods for providing rigidity of the apparatus. When the inside peripheral surface of the curvilinear piece intimately engages an outside peripheral surface of the wafer platform of the ion implanter, or when the first and second linear rods fit snugly on the implanter indicative that the wafer platform is properly calibrated at a zero-angle position. When such fitting is not possible, the wafer platform is then adjusted until a snug fitting is made possible.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: April 20, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Lu-Chang Chen, Yu-Chun Peng, Yi-Yao Tang
  • Publication number: 20030209050
    Abstract: An apparatus and a method for calibrating the position of a wafer platform in an ion implanter, and particularly in a medium current ion implanter. The apparatus is constructed by a curvilinear piece formed in a half-circular shape, a pair of linear rods for supporting the curvilinear piece, and at least one cross-bracing rod connected in-between the pair of linear rods for providing rigidity of the apparatus. When the inside peripheral surface of the curvilinear piece intimately engages an outside peripheral surface of the wafer platform of the ion implanter, or when the first and second linear rods fit snugly on the implanter indicative that the wafer platform is properly calibrated at a zero-angle position. When such fitting is not possible, the wafer platform is then adjusted until a snug fitting is made possible.
    Type: Application
    Filed: May 7, 2002
    Publication date: November 13, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Lu-Chang Chen, Yu-Chun Peng, Yi-Yao Tang