Patents by Inventor Yu Chun SHEN

Yu Chun SHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11901207
    Abstract: A semiconductor wafer processing system includes a stocker having an interior surface, a wafer carrier disposed within the stocker, a wafer shelf disposed within the wafer carrier for storing a semiconductor wafer, and a discharge circuit including a first conductor electrically coupled to the wafer shelf and a first current controller electrically coupled to the first conductor and to the interior surface of the stocker.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: February 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Kai-Hung Hsiao, Chi-Chung Jen, Yu-Chun Shen, Jhang-Jie Jian, Wen-Chih Chiang
  • Publication number: 20230268446
    Abstract: In some implementations, one or more semiconductor processing tools may deposit a first dielectric layer on a substrate of a semiconductor device. The one or more semiconductor processing tools may deposit a floating gate on the first dielectric layer. The one or more semiconductor processing tools may deposit a second dielectric layer on the floating gate and on the substrate of the semiconductor device. The one or more semiconductor processing tools may deposit a first control gate on a first portion of the second dielectric layer. The one or more semiconductor processing tools may deposit a second control gate on a second portion of the second dielectric layer, wherein a third portion of the second dielectric layer is between the first control gate and the floating gate and between the second control gate and the floating gate.
    Type: Application
    Filed: May 2, 2023
    Publication date: August 24, 2023
    Inventors: Yu-Chun SHEN, Chi-Chung JEN, Ya-Chi HUNG, Yu-Chu LIN, Wen-Chih CHIANG
  • Patent number: 11682736
    Abstract: In some implementations, one or more semiconductor processing tools may deposit a first dielectric layer on a substrate of a semiconductor device. The one or more semiconductor processing tools may deposit a floating gate on the first dielectric layer. The one or more semiconductor processing tools may deposit a second dielectric layer on the floating gate and on the substrate of the semiconductor device. The one or more semiconductor processing tools may deposit a first control gate on a first portion of the second dielectric layer. The one or more semiconductor processing tools may deposit a second control gate on a second portion of the second dielectric layer, wherein a third portion of the second dielectric layer is between the first control gate and the floating gate and between the second control gate and the floating gate.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: June 20, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chun Shen, Chi-Chung Jen, Ya-Chi Hung, Yu-Chu Lin, Wen-Chih Chiang
  • Publication number: 20230155036
    Abstract: In some implementations, one or more semiconductor processing tools may form a triple-stacked polysilicon structure on a substrate of a semiconductor device. The one or more semiconductor processing tools may form one or more polysilicon-based devices on the substrate of the semiconductor device, wherein the triple-stacked polysilicon structure has a first height that is greater than one or more second heights of the one or more polysilicon-based devices. The one or more semiconductor processing tools may perform a chemical-mechanical polishing (CMP) operation on the semiconductor device, wherein performing the CMP operation comprises using the triple-stacked polysilicon structure as a stop layer for the CMP operation.
    Type: Application
    Filed: January 23, 2023
    Publication date: May 18, 2023
    Inventors: Chi-Chung JEN, Ya-Chi HUNG, Yu-Chun SHEN, Shun-Neng WANG, Wen-Chih CHIANG
  • Patent number: 11563127
    Abstract: In some implementations, one or more semiconductor processing tools may form a triple-stacked polysilicon structure on a substrate of a semiconductor device. The one or more semiconductor processing tools may form one or more polysilicon-based devices on the substrate of the semiconductor device, wherein the triple-stacked polysilicon structure has a first height that is greater than one or more second heights of the one or more polysilicon-based devices. The one or more semiconductor processing tools may perform a chemical-mechanical polishing (CMP) operation on the semiconductor device, wherein performing the CMP operation comprises using the triple-stacked polysilicon structure as a stop layer for the CMP operation.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: January 24, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Chung Jen, Ya-Chi Hung, Yu-Chun Shen, Shun-Neng Wang, Wen-Chih Chiang
  • Publication number: 20220406639
    Abstract: A semiconductor wafer processing system includes a stocker having an interior surface, a wafer carrier disposed within the stocker, a wafer shelf disposed within the wafer carrier for storing a semiconductor wafer, and a discharge circuit including a first conductor electrically coupled to the wafer shelf and a first current controller electrically coupled to the first conductor and to the interior surface of the stocker.
    Type: Application
    Filed: September 1, 2021
    Publication date: December 22, 2022
    Inventors: Kai-Hung HSIAO, Chi-Chung JEN, Yu-Chun SHEN, Jhang-Jie JIAN, Wen-Chih CHIANG
  • Publication number: 20220216343
    Abstract: In some implementations, one or more semiconductor processing tools may deposit a first dielectric layer on a substrate of a semiconductor device. The one or more semiconductor processing tools may deposit a floating gate on the first dielectric layer. The one or more semiconductor processing tools may deposit a second dielectric layer on the floating gate and on the substrate of the semiconductor device. The one or more semiconductor processing tools may deposit a first control gate on a first portion of the second dielectric layer. The one or more semiconductor processing tools may deposit a second control gate on a second portion of the second dielectric layer, wherein a third portion of the second dielectric layer is between the first control gate and the floating gate and between the second control gate and the floating gate.
    Type: Application
    Filed: January 7, 2021
    Publication date: July 7, 2022
    Inventors: Yu-Chun SHEN, Chi-Chung JEN, Ya-Chi HUNG, Yu-Chu LIN, Wen-Chih CHIANG
  • Publication number: 20220216342
    Abstract: In some implementations, one or more semiconductor processing tools may form a triple-stacked polysilicon structure on a substrate of a semiconductor device. The one or more semiconductor processing tools may form one or more polysilicon-based devices on the substrate of the semiconductor device, wherein the triple-stacked polysilicon structure has a first height that is greater than one or more second heights of the one or more polysilicon-based devices. The one or more semiconductor processing tools may perform a chemical-mechanical polishing (CMP) operation on the semiconductor device, wherein performing the CMP operation comprises using the triple-stacked polysilicon structure as a stop layer for the CMP operation.
    Type: Application
    Filed: January 7, 2021
    Publication date: July 7, 2022
    Inventors: Chi-Chung JEN, Ya-Chi HUNG, Yu-Chun SHEN, Shun-Neng WANG, Wen-Chih CHIANG
  • Patent number: 11299385
    Abstract: A multiple-piece vacuum-insulated heating tank for use in a water dispenser includes a threaded cover, a thermal insulation cover, and a heating tank body. The threaded cover is mounted on an upper opening of the heating tank body and includes a plastic cover and a protective cover mounted on and around the plastic cover. The thermal insulation cover is fitted in the upper opening and includes an upper cover and a lower cover. The lower cover is cup-shaped; is mounted with a heating tube, a water inlet pipe, a water outlet pipe, a thermowell, a temperature-sensing heat pipe, a heat collector block, and two snap-action thermostats at the bottom side; and has a sidewall formed with a step adjacent to the bottom side. The heating tank not only has a multiple-piece structure that facilitates mass production and maintenance, but also dispenses with electronic temperature control as is conventionally required.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: April 12, 2022
    Assignee: SUZHOU OASIS ELECTRONIC CO., LTD.
    Inventor: Yu-Chun Shen
  • Publication number: 20220033243
    Abstract: A multiple-piece vacuum-insulated heating tank for use in a water dispenser includes a threaded cover, a thermal insulation cover, and a heating tank body. The threaded cover is mounted on an upper opening of the heating tank body and includes a plastic cover and a protective cover mounted on and around the plastic cover. The thermal insulation cover is fitted in the upper opening and includes an upper cover and a lower cover. The lower cover is cup-shaped; is mounted with a heating tube, a water inlet pipe, a water outlet pipe, a thermowell, a temperature-sensing heat pipe, a heat collector block, and two snap-action thermostats at the bottom side; and has a sidewall formed with a step adjacent to the bottom side. The heating tank not only has a multiple-piece structure that facilitates mass production and maintenance, but also dispenses with electronic temperature control as is conventionally required.
    Type: Application
    Filed: July 28, 2020
    Publication date: February 3, 2022
    Inventor: Yu-Chun SHEN
  • Patent number: 11198603
    Abstract: The present invention discloses a push-type anti-scalding water dispenser faucet having: a faucet main body; a valve core assembly controlling a water output; a press board mechanism driving the valve core assembly to move; a retaining structure allowing the press board mechanism to switch between a locking position and a release position. The water dispenser faucet comprises a disposable finger stall for mounting onto the press board mechanism or a finger of a user.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: December 14, 2021
    Assignee: SUZHOU OASIS ELECTRONIC CO., LTD.
    Inventor: Yu-Chun Shen
  • Patent number: 10954346
    Abstract: An ink is provided, which includes a resin, UV curable monomer, and photo initiator. The resin is formed by reacting a plurality of end capping agents with a dendrimer compound in an environment including esterification catalyst, inhibitor, and first solvent. The dendrimer compound is formed by reacting a multi-hydroxy compound and a plurality of hydroxy-containing epoxy compounds in an environment including alkaline catalyst and second solvent. The multi-hydroxy compound and the hydroxy-containing epoxy compounds have a molar ratio of 1:6 to 1:20, and the multi-hydroxy compound and the end capping agents have a molar ratio of 1:6 to 1:20. The end capping agents include acrylic acid, methacrylic acid, glycidyl methacrylate, or 2-amino acrylic acid. The resin and the UV curable monomer have a weight ratio of 100:30 to 100:5000, and the resin and the photo initiator have a weight ratio of 100:30 to 100:500.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: March 23, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hsi-Kang Shih, Shinn-Jen Chang, Chung Huan Hsu, Yu Chun Shen
  • Publication number: 20200207923
    Abstract: An ink is provided, which includes a resin, UV curable monomer, and photo initiator. The resin is formed by reacting a plurality of end capping agents with a dendrimer compound in an environment including esterification catalyst, inhibitor, and first solvent. The dendrimer compound is formed by reacting a multi-hydroxy compound and a plurality of hydroxy-containing epoxy compounds in an environment including alkaline catalyst and second solvent. The multi-hydroxy compound and the hydroxy-containing epoxy compounds have a molar ratio of 1:6 to 1:20, and the multi-hydroxy compound and the end capping agents have a molar ratio of 1:6 to 1:20. The end capping agents include acrylic acid, methacrylic acid, glycidyl methacrylate, or 2-amino acrylic acid. The resin and the UV curable monomer have a weight ratio of 100:30 to 100:5000, and the resin and the photo initiator have a weight ratio of 100:30 to 100:500.
    Type: Application
    Filed: December 27, 2018
    Publication date: July 2, 2020
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hsi-Kang SHIH, Shinn-Jen CHANG, Chung Huan HSU, Yu Chun SHEN