Patents by Inventor Yu-chung Huang

Yu-chung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220380566
    Abstract: A crosslinkable and foamable composition is provided, which comprises a hydrogenated styrenic diblock copolymer, a free radical initiator and a foaming agent, wherein the hydrogenated styrenic diblock copolymer comprises: a first block comprising a conjugated diene monomer unit; and a second block comprising a styrene unit, wherein the hydrogenated styrenic diblock copolymer comprises 10 to 60 wt % of the styrene unit, 50 mol % or more of the conjugated diene monomer unit is hydrogenated, and the hydrogenated styrenic diblock copolymer has a weight average molecular weight of 30000 to 200000. In addition, a foam obtained by crosslinking and foaming the aforesaid crosslinkable and foamable composition is also provided.
    Type: Application
    Filed: May 27, 2022
    Publication date: December 1, 2022
    Inventors: Richard Tien-Hua CHOU, Yu-Yan LI, Wei-Chin HUANG, You-Min WANG, Jing-Chung KUO
  • Publication number: 20220367794
    Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 17, 2022
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Chien Chung Huang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Patent number: 11499219
    Abstract: A method of fabricating a thin film with a varying thickness includes the steps of providing a shadow mask with an opening, providing a carrier plate, arranging a substrate on the carrier plate, and coating the substrate through the opening whilst rotating the carrier plate relative to the shadow mask. A plurality of zones of the substrates is swept and exposed from arcuate portions of the opening per each turn by a plurality of predetermined exposure times, respectively. The varying thickness of the thin film corresponds to variation of the predetermined exposure times.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: November 15, 2022
    Assignee: National Chiao Tung University
    Inventors: Cheng-Sheng Huang, Chi-Yung Hsieh, Yu-Chi Lin, Chih-Chung Wu, Chi-Fang Huang
  • Publication number: 20220357211
    Abstract: The present invention provides a processing circuit including logic cells and a thermal sensor. The thermal sensor is positioned within the logic cells and surrounded by the logic cells, and the logic cells and the thermal sensor are all implemented by core devices.
    Type: Application
    Filed: April 13, 2022
    Publication date: November 10, 2022
    Applicant: MEDIATEK INC.
    Inventors: Min-Hang Hsieh, Jyun-Jia Huang, Chien-Sheng Chao, Ghien-An Shih, Ching-Chung Ko, Yu-Cheng Su, Lin-Chien Chen, Ai-Yun Liu, Chia-Hsin Hu
  • Patent number: 11495681
    Abstract: A semiconductor device includes a semiconductor substrate, a recess, a first gate oxide layer, and a gate structure. The semiconductor substrate includes a first region and a second region adjacent to the first region. The recess is disposed in the first region of the semiconductor substrate, and an edge of the recess is located at an interface between the first region and the second region. At least a part of the first gate oxide layer is disposed in the recess. The first gate oxide layer includes a hump portion disposed adjacent to the edge of the recess, and a height of the hump portion is less than a depth of the recess. The gate structure is disposed on the first region and the second region of the semiconductor substrate, and the gate structure overlaps the hump portion of the first gate oxide layer in a vertical direction.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: November 8, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chang-Po Hsiung, Ching-Chung Yang, Shan-Shi Huang, Shin-Hung Li, Nien-Chung Li, Wen-Fang Lee, Chiu-Te Lee, Chih-Kai Hsu, Chun-Ya Chiu, Chin-Hung Chen, Chia-Jung Hsu, Ssu-I Fu, Yu-Hsiang Lin
  • Patent number: 11495511
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a semiconductor package device, a first constraint structure and a second constraint structure. The first constraint structure is connected to the semiconductor package device. The second constraint structure is connected to the semiconductor package device and under a projection of the semiconductor package device.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: November 8, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yu-Che Huang, Lu-Ming Lai, Ying-Chung Chen
  • Patent number: 11482830
    Abstract: A measurement method for a vertical cavity surface emitting laser diode (VCSEL) and an epitaxial wafer test fixture are provided, especially the Fabry-Perot Etalon of the bottom-emitting VCSEL can be measured. When the Fabry-Perot Etalon of the bottom-emitting VCSEL is measured by a measurement apparatus, a light of the test light source of the measurement apparatus is incident from the substrate surface of the VCSEL epitaxial wafer such that the Fabry-Perot Etalon of the bottom-emitting VCSEL is acquired. Through the VCSEL epitaxial wafer test fixture, the bottom-emitting VCSEL can be directly measured by the existing measurement apparatus such that there is no need to change the optical design of the measurement apparatus, and it can prevent the VCSEL epitaxial wafer from being scratched or contaminated.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: October 25, 2022
    Assignee: VISUAL PHOTONICS EPITAXY CO., LTD.
    Inventors: Chao-Hsing Huang, Yu-Chung Chin, Van-Truong Dai
  • Publication number: 20220334167
    Abstract: A method for detecting defects in a GaN high electron mobility transistor is disclosed. The method includes steps of measuring a plurality of electrical characteristics of a GaN high electron mobility transistor, measuring the plurality of electrical characteristics after performing a deterioration test on the GaN high electron mobility transistor, irradiating the GaN high electron mobility transistor in turns with a plurality of light sources with different wavelengths and measuring the plurality of electrical characteristics after each irradiation of the GaN high electron mobility transistor by each of the plurality of light sources, and comparing changes of the plurality of electrical characteristics measured in the above steps to determine the defect location of the GaN high electron mobility transistor.
    Type: Application
    Filed: June 10, 2021
    Publication date: October 20, 2022
    Inventors: Ting-Chang CHANG, Hao-Xuan ZHENG, Yu-Shan LIN, Fu-Yuan JIN, Fong-Min CIOU, Mao-Chou TAI, Yun-Hsuan LIN, Wei-Chen HUANG, Wen-Chung CHEN
  • Publication number: 20220328645
    Abstract: Provided is a semiconductor epitaxial wafer, including a substrate, a first epitaxial structure, a first ohmic contact layer and a second epitaxial stack structure. It is characterized in that the ohmic contact layer includes a compound with low nitrogen content, and the ohmic contact layer does not induce significant stress during the crystal growth process. Accordingly, the second epitaxial stack structure formed on the ohmic contact layer can have good epitaxial quality, thereby providing a high-quality semiconductor epitaxial wafer for fabricating a GaAs integrated circuit or a InP integrated circuit. At the same time, the ohmic contact properties of ohmic contact layers are not affected, and the reactants generated during each dry etching process are reduced.
    Type: Application
    Filed: April 7, 2022
    Publication date: October 13, 2022
    Inventors: Chao-Hsing Huang, Yu-Chung Chin, Van-Truong Dai
  • Patent number: 11468705
    Abstract: A display device with a fingerprint sensing function is provided. The display device includes a display panel and a sensor panel. The display panel includes a plurality of display pixels. The sensor panel is disposed under the display panel. The sensor panel includes a plurality of sensor pixels arranged in an array. The array has a first sensor pitch in a first direction. Each of the sensor pixels includes a sensor. Every two neighboring sensors of the sensors have a first shift pitch in the first direction, and the first shift pitch is not equal to the first sensor pitch.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: October 11, 2022
    Assignee: Novatek Microelectronics Corp.
    Inventors: Po-Jui Liao, Yu-Hsiang Huang, Kuei-Chung Chang
  • Publication number: 20220301922
    Abstract: A device includes a substrate, a first fin, a second fin, a first isolation structure, a second isolation structure, and a gate structure. The first fin extends from a p-type region of the substrate. The second fin extends from an n-type region of the substrate. The first isolation structure is over the p-type region and adjacent to the first fin. The first isolation structure has a bottom surface and opposite first and second sidewalls connected to the bottom surface, a first round corner is between the bottom surface and the first sidewall of the first isolation structure, and the first sidewall is substantially parallel to the second sidewall. The second isolation structure is over the n-type region and adjacent to the first fin. The first isolation structure is deeper than the second isolation structure. The gate structure is over the first isolation structure and covering the first fin.
    Type: Application
    Filed: July 9, 2021
    Publication date: September 22, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsien-Chung HUANG, Chiung-Wen HSU, Mei-Ju KUO, Yu-Ting WENG, Yu-Chi LIN, Ting-Chung WANG, Chao-Cheng CHEN
  • Publication number: 20220299891
    Abstract: An extreme ultraviolet (EUV) source includes a module vessel and a scrubber system. The scrubber system may include a plurality of gutters in the module vessel. The plurality of gutters may include a first gutter and a second gutter. The second gutter may be lower than the first gutter in the module vessel. A unit volume of the second gutter is larger than a unit volume of the first gutter.
    Type: Application
    Filed: August 27, 2021
    Publication date: September 22, 2022
    Inventors: Chun-Kai CHANG, Yu Sheng CHIANG, Yu De LIOU, Chi YANG, Ching-Juinn HUANG, Po-Chung CHENG
  • Patent number: 11440504
    Abstract: The present disclosure relates to methods and associated systems for unlocking a vehicle. The vehicle has a first input device and a second input device. The method includes (1) receiving a passcode from the first input device; (2) receiving a confirmation of the passcode from the second input device; and (3) in response to the confirmation, storing the passcode in a storage device associated with the vehicle. The passcode is input by operating the first input device in a first predetermined way, and, the confirmation is input by operating the second input device in a second predetermined way.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: September 13, 2022
    Assignee: Gogoro Inc.
    Inventors: Hok-Sum Horace Luke, Chun-Sheng Hsu, Yung-Chung Hu, Jia-Yang Wu, Yu-Sheng Huang
  • Publication number: 20220283506
    Abstract: A control system includes a plurality of pressure sensors, each to detect a pressure in a respective dynamic gas lock (DGL) nozzle control region of a plurality of DGL nozzle control regions. Each DGL nozzle control region includes one or more DGL nozzles. The control system includes a plurality of mass flow controllers (MFCs). Each MFC of the plurality of MFCs is to control a flow velocity in a respective DGL nozzle control region of the plurality of DGL nozzle control regions. The control system includes a controller to selectively cause one or more MFCs of the plurality of MFCs to adjust flow velocities in one or more DGL nozzle control regions of the plurality of DGL nozzle control regions based on pressures detected by the plurality of pressure sensors in DGL nozzle control regions of the plurality of DGL nozzle control regions.
    Type: Application
    Filed: August 27, 2021
    Publication date: September 8, 2022
    Inventors: Chun-Kai CHANG, Yu Sheng CHIANG, Yu De LIOU, Chi YANG, Ching-Juinn HUANG, Po-Chung CHENG
  • Patent number: 11435237
    Abstract: The invention provides a temperature sensing device of an integrated circuit. The integrated circuit includes a plurality of stacked metal wire layers, and the temperature sensing device includes a first metal sheet, a first via and a second via. The first metal sheet is disposed between the first metal wire layer and the second metal wire layer of the metal wire layers. The first via and the second via are used to connect the first metal sheet and the first metal wire layer, wherein a temperature sensing signal enters the first metal sheet through the first via and leaves the first metal sheet through the second via to measure the temperature of the integrated circuit.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: September 6, 2022
    Assignee: ITE Tech. Inc.
    Inventors: Yi-Chung Chou, Yu-Chin Chen, Tzu-I Huang
  • Patent number: 11411176
    Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: August 9, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Chien Chung Huang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Patent number: 11406022
    Abstract: A method of fabricating a substrate having a through via includes: providing a carrier board having a release layer thereon; attaching the substrate onto the carrier board via the release layer; applying a light beam to the substrate to form a first blind hole in the substrate, wherein the first blind hole penetrates a first surface and a second surface of the substrate; performing an enlargement process on the first blind hole to form a second blind hole; forming a through via in the second blind hole; and performing a de-bonding process to release the substrate having a through via from the carrier board.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: August 2, 2022
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-I Wu, Shih-Ming Lin, Pin-Hao Hu, Yu-Chung Lin, Hsin-Yu Chang, Fu-Lung Chou, Chien-Jung Huang
  • Publication number: 20220204772
    Abstract: A bioprintable material is provided. The bioprintable material includes a hydrogel and microfilaments mixed in the hydrogel. The hydrogel includes a first collagen. The microfilament includes a second collagen. The diameter of the microfilament is ranging from 5 microns to 200 microns. The weight ratio of the microfilaments to the first collagen is ranging from 0.01:1 to 10:1.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 30, 2022
    Applicant: Industrial Technology Research Institute
    Inventors: Yun-Chung TENG, Jen-Huang HUANG, Ying-Wen SHEN, Yu-Bing LIOU, Hsin-Yi HSU, Li-Hsin LIN, Yuchi WANG, Hsin-Hsin SHEN
  • Patent number: 11375613
    Abstract: An aerosol generator includes a container and an atomizing module arranged in the container. The container has a liquid chamber and an aerosol chamber respectively arranged at two opposite sides of the atomizing module. The atomizing module includes an annular vibration plate, a microporous member, and a circuit board. The vibration plate has a first hole, and the microporous member is disposed on the vibration plate and covers the first hole. The circuit board is electrically coupled to an electrical contact of the vibration plate. The circuit board is arranged at one side of at least part of the vibration plate, and the circuit board and the at least part of the vibration plate have a gap there-between. A projected region defined by orthogonally projecting the circuit board onto a plane overlapping with the electrical contact partially covers the least part of the vibration plate.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: June 28, 2022
    Assignee: MICROBASE TECHNOLOGY CORP.
    Inventors: Chien-Hua Lin, Shao-Yi Huang, Yu-Chung Hsu, Kai-Yao Lo
  • Publication number: 20210252502
    Abstract: A microfluidic detection unit comprises at least one fluid injection section, a fluid storage section and a detection section. Each fluid injection section defines a fluid outlet; the fluid storage section is in gas communication with the atmosphere and defines a fluid inlet; the detection section defines a first end in communication with the fluid outlet and a second end in communication with the fluid inlet. A height difference is defined between the fluid outlet and the fluid inlet along the direction of gravity. When a first fluid is injected from the at least one fluid injection section, the first fluid is driven by gravity to pass through the detection section and accumulate to form a droplet at the fluid inlet, such that a state of fluid pressure equilibrium of the first fluid is established.
    Type: Application
    Filed: June 10, 2019
    Publication date: August 19, 2021
    Inventors: Yu-Chung HUANG, Yi-Li SUN, Ting-Chou CHANG, Jhy-Wen WU, Nan-Kuang YAO, Lai-Kwan CHAU, Shau-Chun WANG, Ying Ting CHEN