Abstract: A semiconductor structure includes a substrate and a dielectric material disposed over the substrate. A void is disposed within the dielectric material. A dielectric liner is disposed along inner sidewalls of the dielectric material proximate to the void. An inner surface of the dielectric liner defines an outer extent of the void, and the dielectric liner includes an inner liner layer and an outer liner layer.

Abstract: A semiconductor structure includes a substrate and a dielectric material disposed over the substrate. A void is disposed within the dielectric material. A dielectric liner is disposed along inner sidewalls of the dielectric material proximate to the void. An inner surface of the dielectric liner defines an outer extent of the void, and the dielectric liner includes an inner liner layer and an outer liner layer.

Abstract: A semiconductor structure includes a substrate and a dielectric material disposed over the substrate. A void is disposed within the dielectric material. A dielectric liner is disposed along inner sidewalls of the dielectric material proximate to the void. An inner surface of the dielectric liner defines an outer extent of the void, and the dielectric liner includes an inner liner layer and an outer liner layer.

Abstract: A method and system for establishing a Bluetooth mesh network are provided. The method for establishing a Bluetooth mesh network includes the steps of broadcasting the configuration packet to a plurality of controlled devices to establish a Bluetooth mesh network; receiving at least one response packet from at least one of the controlled devices; and transmitting control setting information to the at least one of the controlled devices according to the received response packet.

Abstract: A semiconductor structure includes a substrate, a gate structure disposed over the substrate, a dielectric material disposed over the substrate and the gate structure, a conductive structure extending within the dielectric material, and a void extending within the dielectric material and disposed over the gate structure.

Abstract: A method and system for establishing a Bluetooth mesh network are provided. The method for establishing a Bluetooth mesh network includes the steps of broadcasting the configuration packet to a plurality of controlled devices to establish a Bluetooth mesh network; receiving at least one response packet from at least one of the controlled devices; and transmitting control setting information to the at least one of the controlled devices according to the received response packet.

Abstract: A semiconductor structure includes a substrate, a gate structure disposed over the substrate, a dielectric material disposed over the substrate and the gate structure, a conductive structure extending within the dielectric material, and a void extending within the dielectric material and disposed over the gate structure.

Abstract: A semiconductor structure includes a substrate, a gate structure disposed over the substrate, a dielectric material disposed over the substrate and the gate structure, a conductive structure extending within the dielectric material, and a void extending within the dielectric material and disposed over the gate structure.

Abstract: A semiconductor structure includes a substrate, a gate structure disposed over the substrate, a dielectric material disposed over the substrate and the gate structure, a conductive structure extending within the dielectric material, and a void extending within the dielectric material and disposed over the gate structure.

Abstract: A liquid crystal display includes a liquid crystal panel, a source driving circuit, a timing controller, and a gate driving circuit. The source driving circuit converts frame data into a plurality of data voltages, and charges/discharges a first data line according to a data voltage of the plurality of data voltages. The gate driving circuit enables a gate line corresponding to the data voltage. The timing controller sequentially enables a plurality of switch enable lines corresponding to the gate line. A plurality of pixel switches are turned on according to the enabled gate line. A data line switch is turned on according to an enabled switch enable line. The data voltage charges/discharges a corresponding pixel through the turned-on data line switch and one of the turned-on pixel switches.

Abstract: A liquid crystal display includes a liquid crystal panel, a source driving circuit, a timing controller, and a gate driving circuit. The source driving circuit converts frame data into a plurality of data voltages, and charges/discharges a first data line according to a data voltage of the plurality of data voltages. The gate driving circuit enables a gate line corresponding to the data voltage. The timing controller sequentially enables a plurality of switch enable lines corresponding to the gate line. A plurality of pixel switches are turned on according to the enabled gate line. A data line switch is turned on according to an enabled switch enable line. The data voltage charges/discharges a corresponding pixel through the turned-on data line switch and one of the turned-on pixel switches.

Abstract: A wireless system package includes a substrate, an external non-volatile memory, a first integrated circuit, and a second integrated circuit. The first integrated circuit includes a System on Chip unit, a bus, a first clock unit, a first terminal, a second terminal, and a third terminal. The second integrated circuit includes a second heterogeneous communication module, a second clock unit, a first terminal, and a second terminal. The first integrated circuit or the second integrated circuit includes a first heterogeneous communication module for providing and processing a first wireless signal. A capacity of the external non-volatile memory is larger than a capacity of the internal non-volatile memory.

Abstract: The disclosure provides a gate driving circuit on array applied to a display panel with charge sharing pixel structure. In particular, the gate driving circuit is adapted to receive multi-phase clock signal and includes a plurality of shift registers. Each shift register includes a driving circuit including a first driving transistor and a second driving transistor, a pull-down unit and at least one pull-up unit, so that is capable of generating mutually non-overlapped main gate driving signal and sub gate driving signal. Furthermore, the advantage of the disclosure is to provide a gate driving circuit with simplified circuit structure and circuit layout.

Abstract: A display apparatus and a method for generating gate signal thereof are provided. The display apparatus includes a timing controller and a display panel. The timing controller is used for providing a plurality of timing signals. The display panel includes a pixel array and a gate drive circuit. The pixel array has a plurality of pixels. The gate drive circuit is electrically connected to the timing controller and the pixel array and including a plurality of shift register circuits. The shift register circuit includes a first shift register and a second shift register. The first shift register is configured for generating a corresponding primary gate signal. The second shift register is configured for generating a corresponding secondary gate signal. The timing controller adjusts overlapping relations of the timing signals according to a frame rate of the display apparatus.

Abstract: A liquid crystal display includes a liquid crystal panel, a source driving circuit, a timing controller, and a gate driving circuit. The source driving circuit converts frame data into a plurality of data voltages, and charges/discharges a first data line according to a data voltage of the plurality of data voltages. The gate driving circuit enables a gate line corresponding to the data voltage. The timing controller sequentially enables a plurality of switch enable lines corresponding to the gate line. A plurality of pixel switches are turned on according to the enabled gate line. A data line switch is turned on according to an enabled switch enable line. The data voltage charges/discharges a corresponding pixel through the turned-on data line switch and one of the turned-on pixel switches.

Abstract: A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.

Abstract: A shift register includes a plurality of shift register circuits, where an Nth shift register circuit of the shift register includes a driving unit, a boost unit, a pull up unit, and a key pull down unit. The driving unit is for providing a gate signal, a first boost control signal, and a first transmission control signal according a first driving signal and a high frequency clock signal. The boost unit is for boosting the voltage of the first driving signal according to a first boost signal. The pull up unit is for providing a second driving signal according to the first transmission control signal and the gate signal, and is for providing a second boost signal according to the first boost control signal and a second boost control signal. The key pull down unit is for pulling down the first driving signal according to a second transmission control signal.

Abstract: A LCD panel with an improved pixel array configuration is provided. The LCD panel uses a column inversion driving method to drive the data lines so as to achieve a stable common voltage. Moreover, by cross-connecting the layout traces of the wiring zone in a specified manner, the gate pulses outputted from every two gate lines neighboring the sub-pixel are not overlapped with each other, so that the frame can be normally displayed.

Abstract: An exemplary gate driving circuit is adapted for driving a display panel including multiple pixels and includes a first gate driving unit string and a second gate driving unit string. The first gate driving unit string includes multiple cascade-connected first gate driving units and receives a start pulse. The first gate driving units are for generating output pulses to drive the pixels. The second gate driving unit string includes multiple cascade-connected second gate driving units and receives the start pulse. The second gate driving units are for generating output pulses to drive the pixels. The output pulse generated from one of the second gate driving units is provided to one of first gate driving units to determine whether to disable the output pulse of the first gate driving unit which receives the output pulse generated from the second gate driving units.

Abstract: A shift register includes a plurality of shift register circuits, where an Nth shift register circuit of the shift register includes a driving unit, a boost unit, a pull up unit, and a key pull down unit. The driving unit is for providing a gate signal, a first boost control signal, and a first transmission control signal according a first driving signal and a high frequency clock signal. The boost unit is for boosting the voltage of the first driving signal according to a first boost signal. The pull up unit is for providing a second driving signal according to the first transmission control signal and the gate signal, and is for providing a second boost signal according to the first boost control signal and a second boost control signal. The key pull down unit is for pulling down the first driving signal according to a second transmission control signal.