Patents by Inventor Yu-Ciao Lin

Yu-Ciao Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Fabricating method of shallow trench isolation structure
    Patent number: 8815703
    Abstract: A fabricating method of a shallow trench isolation structure includes the following steps. Firstly, a substrate is provided, wherein a high voltage device area is defined in the substrate. Then, a first etching process is performed to partially remove the substrate, thereby forming a preliminary shallow trench in the high voltage device area. Then, a second etching process is performed to further remove the substrate corresponding to the preliminary shallow trench, thereby forming a first shallow trench in the high voltage device area. Afterwards, a dielectric material is filled in the first shallow trench, thereby forming a first shallow trench isolation structure.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: August 26, 2014
    Assignee: United Microelectronics Corporation
    Inventors: Liang-An Huang, Yu-Chun Huang, Chin-Fu Lin, Yu-Ciao Lin, Yu-Chieh Lin, Hsin-Liang Liu, Chun-Hung Cheng, Yuan-Cheng Yang, Yau-Kae Sheu
  • FABRICATING METHOD OF SHALLOW TRENCH ISOLATION STRUCTURE
    Publication number: 20140073109
    Abstract: A fabricating method of a shallow trench isolation structure includes the following steps. Firstly, a substrate is provided, wherein a high voltage device area is defined in the substrate. Then, a first etching process is performed to partially remove the substrate, thereby forming a preliminary shallow trench in the high voltage device area. Then, a second etching process is performed to further remove the substrate corresponding to the preliminary shallow trench, thereby forming a first shallow trench in the high voltage device area. Afterwards, a dielectric material is filled in the first shallow trench, thereby forming a first shallow trench isolation structure.
    Type: Application
    Filed: November 5, 2013
    Publication date: March 13, 2014
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Liang-An Huang, Yu-Chun Huang, Chin-Fu Lin, Yu-Ciao Lin, Yu-Chieh Lin, Hsin-Liang Liu, Chun-Hung Cheng, Yuan-Cheng Yang, Yau-Kae Sheu
  • SHALLOW TRENCH ISOLATION STRUCTURE AND FABRICATING METHOD THEREOF
    Publication number: 20130043513
    Abstract: A fabricating method of a shallow trench isolation structure includes the following steps. Firstly, a substrate is provided, wherein a high voltage device area is defined in the substrate. Then, a first etching process is performed to partially remove the substrate, thereby forming a preliminary shallow trench in the high voltage device area. Then, a second etching process is performed to further remove the substrate corresponding to the preliminary shallow trench, thereby forming a first shallow trench in the high voltage device area. Afterwards, a dielectric material is filled in the first shallow trench, thereby forming a first shallow trench isolation structure.
    Type: Application
    Filed: August 19, 2011
    Publication date: February 21, 2013
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Liang-An HUANG, Yu-Chun Huang, Chin-Fu Lin, Yu-Ciao Lin, Yu-Chieh Lin, Hsin-Liang Liu, Chun-Hung Cheng, Yuan-Cheng Yang, Yau-Kae Sheu