Patents by Inventor Yu-Ciao Lin

Yu-Ciao Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128876
    Abstract: A switching control circuit for use in controlling a resonant flyback power converter generates a first driving signal and a second driving signal. The first driving signal is configured to turn on the first transistor to generate a first current to magnetize a transformer and charge a resonant capacitor. The transformer and charge a resonant capacitor are connected in series. The second driving signal is configured to turn on the second transistor to generate a second current to discharge the resonant capacitor. During a power-on period of the resonant flyback power converter, the second driving signal includes a plurality of short-pulses configured to turn on the second transistor for discharging the resonant capacitor. A pulse-width of the short-pulses of the second driving signal is short to an extent that the second current does not exceed a current limit threshold.
    Type: Application
    Filed: June 15, 2023
    Publication date: April 18, 2024
    Inventors: Yu-Chang Chen, Ta-Yung Yang, Kun-Yu Lin, Fu-Ciao Syu, Chia-Hsien Yang, Hsin-Yi Wu
  • Patent number: 8815703
    Abstract: A fabricating method of a shallow trench isolation structure includes the following steps. Firstly, a substrate is provided, wherein a high voltage device area is defined in the substrate. Then, a first etching process is performed to partially remove the substrate, thereby forming a preliminary shallow trench in the high voltage device area. Then, a second etching process is performed to further remove the substrate corresponding to the preliminary shallow trench, thereby forming a first shallow trench in the high voltage device area. Afterwards, a dielectric material is filled in the first shallow trench, thereby forming a first shallow trench isolation structure.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: August 26, 2014
    Assignee: United Microelectronics Corporation
    Inventors: Liang-An Huang, Yu-Chun Huang, Chin-Fu Lin, Yu-Ciao Lin, Yu-Chieh Lin, Hsin-Liang Liu, Chun-Hung Cheng, Yuan-Cheng Yang, Yau-Kae Sheu
  • Publication number: 20140073109
    Abstract: A fabricating method of a shallow trench isolation structure includes the following steps. Firstly, a substrate is provided, wherein a high voltage device area is defined in the substrate. Then, a first etching process is performed to partially remove the substrate, thereby forming a preliminary shallow trench in the high voltage device area. Then, a second etching process is performed to further remove the substrate corresponding to the preliminary shallow trench, thereby forming a first shallow trench in the high voltage device area. Afterwards, a dielectric material is filled in the first shallow trench, thereby forming a first shallow trench isolation structure.
    Type: Application
    Filed: November 5, 2013
    Publication date: March 13, 2014
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Liang-An Huang, Yu-Chun Huang, Chin-Fu Lin, Yu-Ciao Lin, Yu-Chieh Lin, Hsin-Liang Liu, Chun-Hung Cheng, Yuan-Cheng Yang, Yau-Kae Sheu
  • Publication number: 20130043513
    Abstract: A fabricating method of a shallow trench isolation structure includes the following steps. Firstly, a substrate is provided, wherein a high voltage device area is defined in the substrate. Then, a first etching process is performed to partially remove the substrate, thereby forming a preliminary shallow trench in the high voltage device area. Then, a second etching process is performed to further remove the substrate corresponding to the preliminary shallow trench, thereby forming a first shallow trench in the high voltage device area. Afterwards, a dielectric material is filled in the first shallow trench, thereby forming a first shallow trench isolation structure.
    Type: Application
    Filed: August 19, 2011
    Publication date: February 21, 2013
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Liang-An HUANG, Yu-Chun Huang, Chin-Fu Lin, Yu-Ciao Lin, Yu-Chieh Lin, Hsin-Liang Liu, Chun-Hung Cheng, Yuan-Cheng Yang, Yau-Kae Sheu