Patents by Inventor Yu-Da Chen

Yu-Da Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11024593
    Abstract: A method of forming an integrated circuit structure includes forming a patterned passivation layer over a metal pad, with a top surface of the metal pad revealed through a first opening in the patterned passivation layer, and applying a polymer layer over the patterned passivation layer. The polymer layer is substantially free from N-Methyl-2-pyrrolidone (NMP), and comprises aliphatic amide as a solvent. The method further includes performing a light-exposure process on the polymer layer, performing a development process on the polymer layer to form a second opening in the polymer layer, wherein the top surface of the metal pad is revealed to the second opening, baking the polymer, and forming a conductive region having a via portion extending into the second opening.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: June 1, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Da Cheng, Yung-Ching Chao, Chun Kai Tzeng, Cheng Jen Lin, Chin Wei Kang, Yu-Feng Chen, Mirng-Ji Lii
  • Patent number: 11024594
    Abstract: According to an exemplary embodiment, a substrate having a first area and a second area is provided. The substrate includes a plurality of pads. Each of the pads has a pad size. The pad size in the first area is larger than the pad size in the second area.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: June 1, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Wei-Hung Lin, Hsiu-Jen Lin, Ming-Da Cheng, Yu-Min Liang, Chen-Shien Chen, Chung-Shi Liu
  • Publication number: 20210094103
    Abstract: A power tool structure including a main body, a socket, a positioning ball, a pressing ring, a locking mechanism and a head is provided. The socket is connected to the main body and includes an arc space and a through hole passing through an annular wall of the socket to communicate with the arc space. The positioning ball is movably received in the through hole. The pressing ring includes a track. The locking mechanism sleeves on the pressing ring and is coupled to the pressing ring. The locking mechanism includes a coupling portion corresponding to the track, and the locking mechanism is forced to rotate so as to switch between a first position and a second position relative to the pressing ring, thereby allowing the locking mechanism to selectively press against the positioning ball. The head is pivotally inserted in the socket and includes a positioning portion.
    Type: Application
    Filed: September 27, 2020
    Publication date: April 1, 2021
    Inventors: San-Yih SU, Tian-Chi LAI, Yu-Da CHEN
  • Publication number: 20200348850
    Abstract: A data storage device is provided. The data storage device includes a flash memory and a controller. The flash memory stores a firmware that includes a plurality of mode page settings, and each mode page setting includes a plurality of mode parameters. The controller receives a data out message arranged to rewrite a first mode page setting among the plurality of mode page settings from a host. The controller determines whether the data out message will change the mode parameters which cannot be rewritten in the first mode page setting by performing bitwise logic operations on a new mode page setting in the data out message, preset values of the plurality of mode parameters of the first mode page setting, and a rewriteable setting for each bit of the first mode page setting.
    Type: Application
    Filed: July 15, 2020
    Publication date: November 5, 2020
    Inventors: Te-Kai WANG, Yu-Da CHEN
  • Patent number: 10754548
    Abstract: A data storage device is provided. The data storage device includes a flash memory and a controller. The flash memory stores a firmware. The firmware includes a plurality of mode page settings, and each mode page setting includes a plurality of mode parameters. The controller receives a mode selection command and a data out message arranged to rewrite a first mode page setting among the plurality of mode page settings from a host. The controller determines whether the data out message will change the mode parameters which cannot be rewritten in the first mode page setting according to the data out message. When the data out message will not change the mode parameters which cannot be rewritten in the first mode page setting, the controller determines whether a plurality of new mode parameters are kept in the flash after the data storage device is turned off.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: August 25, 2020
    Assignee: SILICON MOTION, INC.
    Inventors: Te-Kai Wang, Yu-Da Chen
  • Patent number: 10719254
    Abstract: A data storage device includes a memory device and a controller. The memory device includes multiple memory blocks. The memory blocks include single-level cell blocks and multiple-level cell blocks. The controller is coupled to the memory device. When the controller executes a predetermined procedure to write data stored in the single-level cell blocks into the multiple-level cell blocks, the controller is configured to determine whether a valid page count corresponding to each single-level cell block is greater than a threshold, and when the valid page count corresponding to more than one single-level cell block is greater than the threshold, the controller is configured to execute a first merge procedure to directly write the data stored in the single-level cell blocks with the valid page count greater than the threshold into one or more of the multiple-level cell blocks.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: July 21, 2020
    Assignee: Silicon Motion, Inc.
    Inventors: Wen-Sheng Lin, Yu-Da Chen
  • Patent number: 10685120
    Abstract: A data storage device utilized for confirming firmware data includes a flash memory and a controller. The controller is coupled to the flash memory to receive first firmware data and first sorting hash data related to the first firmware data, and it divides a first hash data generated from the first firmware data into a plurality of data groups, and re-assembles the data groups according to a mapping and sorting algorithm to generate second sorting hash data. The controller includes an efuse region for writing the mapping and sorting algorithm. When the controller determines that the second sorting hash data is identical to the first sorting hash data, the first firmware data is allowed to update the controller.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: June 16, 2020
    Assignee: SILICON MOTION, INC.
    Inventor: Yu-Da Chen
  • Patent number: 10635527
    Abstract: A data storage device includes a memory device and a controller. The memory device includes multiple memory blocks. Each memory block includes multiple pages. The controller is coupled to the memory device and includes an ECC engine configured to check and correct errors that have occurred in data stored in the memory blocks. When a number of error bits in a page of one of the memory blocks exceeds a threshold, the controller is configured to add a block number of the memory block in a predetermined queue and when a garbage collection procedure has been triggered, the controller is configured to perform garbage collection on the memory block.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: April 28, 2020
    Assignee: Silicon Motion, Inc.
    Inventors: Wen-Sheng Lin, Yu-Da Chen
  • Patent number: 10630425
    Abstract: The invention introduces a method for reducing data errors in transceiving of a flash storage interface, performed by a processing unit of a first side, at least including: descrambling first data from a second side via an enabled descrambler of a lowest layer; determining whether a reception error is occurred by continuously monitoring first descrambled data; sending a NAC (negative acknowledgement control) frame to the second side to inform the second side that the reception error is occurred for the first data each time the reception error is determined for the first descrambled data; and when a total number of occurrences of the reception errors reaches a predefined threshold, disabling the descrambler of the lowest layer.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: April 21, 2020
    Assignee: SILICON MOTION, INC.
    Inventors: Fu-Jen Shih, Yu-Da Chen
  • Patent number: 10592157
    Abstract: A data storage device includes a memory device and a controller. The memory device includes multiple memory blocks. The memory blocks include single-level cell blocks and multiple-level cell blocks. The controller is coupled to the memory device. When the controller executes a predetermined procedure to write data stored in the single-level cell blocks into the multiple-level cell blocks, the controller is configured to determine whether a valid page count corresponding to each single-level cell block is greater than a threshold, and when the valid page count corresponding to more than one single-level cell block is greater than the threshold, the controller is configured to execute a first merge procedure to directly write the data stored in the single-level cell blocks with the valid page count greater than the threshold into one or more of the multiple-level cell blocks.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: March 17, 2020
    Assignee: Silicon Motion, Inc.
    Inventors: Wen-Sheng Lin, Yu-Da Chen
  • Patent number: 10592410
    Abstract: A data storage device includes a memory device and a controller. The memory device includes a first buffer, a second buffer, and a backup memory block. The first buffer is an MLC block and the second buffer is an SLC block. The controller is coupled to the memory device, receives a write command to write predetermined data in the memory device and determines whether the predetermined data has to be written into different buffers. When the controller determines that the predetermined data has to be written into different buffers, the controller writes a portion of the predetermined data that has been written in one or more predetermined pages of the first buffer into the backup memory block.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: March 17, 2020
    Assignee: Silicon Motion, Inc.
    Inventors: Wen-Sheng Lin, Yu-Da Chen
  • Publication number: 20190286331
    Abstract: A data storage device is provided. The data storage device includes a flash memory and a controller. The flash memory stores a firmware. The firmware includes a plurality of mode page settings, and each mode page setting includes a plurality of mode parameters. The controller receives a mode selection command and a data out message arranged to rewrite a first mode page setting among the plurality of mode page settings from a host. The controller determines whether the data out message will change the mode parameters which cannot be rewritten in the first mode page setting according to the data out message. When the data out message will not change the mode parameters which cannot be rewritten in the first mode page setting, the controller determines whether a plurality of new mode parameters are kept in the flash after the data storage device is turned off.
    Type: Application
    Filed: June 5, 2019
    Publication date: September 19, 2019
    Inventors: Te-Kai WANG, Yu-Da CHEN
  • Patent number: 10353584
    Abstract: A data storage device is provided. The data storage device includes a flash memory and a controller. The flash memory stores a firmware. The firmware includes a plurality of mode page settings, and each mode page setting includes a plurality of mode parameters. The controller receives a data out message from a host, arranged to rewrite a first mode page setting among the plurality of mode page settings. The controller determines whether the data out message will change the mode parameters which cannot be rewritten in the first mode page setting according to the data out message. When the data out message will change the mode parameters which cannot be rewritten in the first mode page setting, the controller replies to the host with an UPIU response message indicating a failure event.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: July 16, 2019
    Assignee: SILICON MOTION, INC.
    Inventors: Te-Kai Wang, Yu-Da Chen
  • Publication number: 20190147165
    Abstract: A data storage device utilized for confirming firmware data includes a flash memory and a controller. The controller is coupled to the flash memory to receive first firmware data and first sorting hash data related to the first firmware data, and it divides a first hash data generated from the first firmware data into a plurality of data groups, and re-assembles the data groups according to a mapping and sorting algorithm to generate second sorting hash data. The controller includes an efuse region for writing the mapping and sorting algorithm. When the controller determines that the second sorting hash data is identical to the first sorting hash data, the first firmware data is allowed to update the controller.
    Type: Application
    Filed: July 19, 2018
    Publication date: May 16, 2019
    Inventor: Yu-Da CHEN
  • Publication number: 20190146704
    Abstract: A data storage device includes a memory device and a controller. The memory device includes multiple memory blocks. The memory blocks include single-level cell blocks and multiple-level cell blocks. The controller is coupled to the memory device. When the controller executes a predetermined procedure to write data stored in the single-level cell blocks into the multiple-level cell blocks, the controller is configured to determine whether a valid page count corresponding to each single-level cell block is greater than a threshold, and when the valid page count corresponding to more than one single-level cell block is greater than the threshold, the controller is configured to execute a first merge procedure to directly write the data stored in the single-level cell blocks with the valid page count greater than the threshold into one or more of the multiple-level cell blocks.
    Type: Application
    Filed: July 19, 2018
    Publication date: May 16, 2019
    Inventors: Wen-Sheng Lin, Yu-Da Chen
  • Publication number: 20190146705
    Abstract: A data storage device includes a memory device and a controller. The memory device includes multiple memory blocks. The memory blocks include single-level cell blocks and multiple-level cell blocks. The controller is coupled to the memory device. When the controller executes a predetermined procedure to write data stored in the single-level cell blocks into the multiple-level cell blocks, the controller is configured to determine whether a valid page count corresponding to each single-level cell block is greater than a threshold, and when the valid page count corresponding to more than one single-level cell block is greater than the threshold, the controller is configured to execute a first merge procedure to directly write the data stored in the single-level cell blocks with the valid page count greater than the threshold into one or more of the multiple-level cell blocks.
    Type: Application
    Filed: October 16, 2018
    Publication date: May 16, 2019
    Inventors: Wen-Sheng Lin, Yu-Da Chen
  • Publication number: 20190095321
    Abstract: A data storage device includes a memory device and a controller. The memory device includes a first buffer, a second buffer, and a backup memory block. The first buffer is an MLC block and the second buffer is an SLC block. The controller is coupled to the memory device, receives a write command to write predetermined data in the memory device and determines whether the predetermined data has to be written into different buffers. When the controller determines that the predetermined data has to be written into different buffers, the controller writes a portion of the predetermined data that has been written in one or more predetermined pages of the first buffer into the backup memory block.
    Type: Application
    Filed: July 19, 2018
    Publication date: March 28, 2019
    Inventors: Wen-Sheng Lin, Yu-Da Chen
  • Publication number: 20190095276
    Abstract: A data storage device includes a memory device and a controller. The memory device includes multiple memory blocks. Each memory block includes multiple pages. The controller is coupled to the memory device and includes an ECC engine configured to check and correct errors that have occurred in data stored in the memory blocks. When a number of error bits in a page of one of the memory blocks exceeds a threshold, the controller is configured to add a block number of the memory block in a predetermined queue and when a garbage collection procedure has been triggered, the controller is configured to perform garbage collection on the memory block.
    Type: Application
    Filed: July 19, 2018
    Publication date: March 28, 2019
    Inventors: Wen-Sheng Lin, Yu-Da Chen
  • Publication number: 20190007169
    Abstract: The invention introduces a method for reducing data errors in transceiving of a flash storage interface, performed by a processing unit of a first side, at least including: descrambling first data from a second side via an enabled descrambler of a lowest layer; determining whether a reception error is occurred by continuously monitoring first descrambled data; sending a NAC (negative acknowledgement control) frame to the second side to inform the second side that the reception error is occurred for the first data each time the reception error is determined for the first descrambled data; and when a total number of occurrences of the reception errors reaches a predefined threshold, disabling the descrambler of the lowest layer.
    Type: Application
    Filed: June 20, 2018
    Publication date: January 3, 2019
    Inventors: Fu-Jen SHIH, Yu-Da CHEN
  • Publication number: 20180217758
    Abstract: A data storage device is provided. The data storage device includes a flash memory and a controller. The flash memory stores a firmware. The firmware includes a plurality of mode page settings, and each mode page setting includes a plurality of mode parameters. The controller receives a data out message from a host, arranged to rewrite a first mode page setting among the plurality of mode page settings. The controller determines whether the data out message will change the mode parameters which cannot be rewritten in the first mode page setting according to the data out message. When the data out message will change the mode parameters which cannot be rewritten in the first mode page setting, the controller replies to the host with an UPIU response message indicating a failure event.
    Type: Application
    Filed: February 1, 2018
    Publication date: August 2, 2018
    Inventors: Te-Kai WANG, Yu-Da CHEN