Patents by Inventor Yu-Fan Chang
Yu-Fan Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240106112Abstract: An antenna module is disposed to an electronic device includes a fixed member, a rotating component, a reflector, a director, and an antenna unit. The electronic device includes a first body and a second body. The first body has a first surface and a second surface. The fixed member is disposed to the first body fixedly. The rotating component is connected to the fixed member rotatably. The reflector and the director are disposed to the rotating component. The antenna unit is disposed to the first body and between the reflector and the director. When the first body and the second body rotate relative to each other, the reflector is located between the antenna unit and one of the first surface and the second surface, and the director is located between the antenna unit and another one of the first surface and the second surface.Type: ApplicationFiled: November 21, 2022Publication date: March 28, 2024Applicant: ASUSTeK COMPUTER INC.Inventors: Jo-Fan Chang, Yu Chen, Jhih-Ning Cheng, Yu-Hsun Huang
-
Patent number: 11922855Abstract: An information handling system includes a host processing system and a Liquid Crystal Display device. The host processing system includes a graphics processing unit (GPU) and the LCD device includes a memory device and a DisplayPort Configuration Data (DPCD) register. The host processing system 1) determines whether the first GPU supports a Dynamic Display Shifting (DDS) mode, 2) when the GPU does not support the DDS mode, provides a first indication to the LCD device that the GPU does not support the DDS mode, and 3) when the GPU supports the DDS mode, provides a second indication to the LCD device that the GPU supports the DDS mode. The LCD device retrieves a Panel Self Refresh (PSR) setting from the memory device and stores the PSR setting to the DPCD register in response to the first indication, and retrieves a DDS setting from the memory and stores the DDS setting to the DPCD register in response to the second indication.Type: GrantFiled: January 31, 2022Date of Patent: March 5, 2024Assignee: Dell Products L.P.Inventors: Chun-Yi Chang, Yi-Fan Wang, Meng-Feng Hung, No-Hua Chuang, Yu Sheng Chang
-
Publication number: 20240074209Abstract: A semiconductor device includes a substrate having a logic region and a magnetoresistive random access memory (MRAM) region, a MTJ on the MRAM region, a metal interconnection on the MTJ, and a blocking layer on the metal interconnection. Preferably, the blocking layer includes a stripe pattern according to a top view and the blocking layer could include metal or a dielectric layer.Type: ApplicationFiled: November 2, 2023Publication date: February 29, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Jia-Rong Wu, I-Fan Chang, Rai-Min Huang, Ya-Huei Tsai, Yu-Ping Wang
-
Publication number: 20240047593Abstract: A thin film photovoltaic structure has a substrate, a first conductive layer, a photovoltaic layer, a second conductive layer, multiple serial connection conductive layers and multiple first insulating areas. By using the serial connection conductive layer, each width between each adjacent serially connected photovoltaic structures is reduced, and an effective area of the thin film photovoltaic structure for collecting optic energy is increased, thus enhancing a geometry fill factor of the thin film photovoltaic structure. Further, by using the serial connection conductive layer and the first insulating area to form contact overlap areas in an overlapping arrangement, it can effectively protect conductive areas in the first conductive layer when etching the second conductive layer during the manufacturing process, which prevents the conductive areas from being damaged to not act as electrodes, and efficiently increases a manufacture yielding rate of the thin film photovoltaic structure.Type: ApplicationFiled: July 24, 2023Publication date: February 8, 2024Inventors: CHUNG-WEN KO, YU-FAN CHANG, YU-YANG CHANG, SUNG-CHIEN HUANG, HSIOU-MING LIU
-
Patent number: 11522151Abstract: An organic light-emitting device includes a first electrode layer, an emission layer, an electron transporting layer, an electron injection layer, and a second electrode layer sequentially formed from bottom to top. The emission layer includes a guest light-emitting material, a first phenyl phosphine oxide derivative and a hole transporting material. The electron transporting layer includes a second phenyl phosphine oxide derivative and a third phenyl phosphine oxide derivative different from the second phenyl phosphine oxide derivative. One of the second phenyl phosphine oxide derivative and the third phenyl phosphine oxide derivative is identical to the first phenyl phosphine oxide derivative. The electron injection layer includes an alkaline metal compound.Type: GrantFiled: January 29, 2019Date of Patent: December 6, 2022Assignee: NATIONAL CHIAO TUNG UNIVERSITYInventors: Hsin-Fei Meng, Sheng-Fu Horng, Yu-Chiang Chao, Chih-Yu Chang, Yu-Fan Chang, Mei-Peng Liou, Qian-Wei Lin, Hsiao-Tso Su, Chiung-Wen Chang
-
Publication number: 20190355921Abstract: An organic light-emitting device includes a first electrode layer, an emission layer, an electron transporting layer, an electron injection layer, and a second electrode layer sequentially formed from bottom to top. The emission layer includes a guest light-emitting material, a first phenyl phosphine oxide derivative and a hole transporting material. The electron transporting layer includes a second phenyl phosphine oxide derivative and a third phenyl phosphine oxide derivative different from the second phenyl phosphine oxide derivative. One of the second phenyl phosphine oxide derivative and the third phenyl phosphine oxide derivative is identical to the first phenyl phosphine oxide derivative. The electron injection layer includes an alkaline metal compound.Type: ApplicationFiled: January 29, 2019Publication date: November 21, 2019Inventors: Hsin-Fei MENG, Sheng-Fu HORNG, Yu-Chiang CHAO, Chih-Yu CHANG, Yu-Fan CHANG, Mei-Peng LIOU, Qian-Wei LIN, Hsiao-Tso SU, Chiung -Wen CHANG
-
Patent number: 10453805Abstract: A chip stack having a protection structure for semiconductor device package, which comprises a first chip and a second chip stacked with each other, wherein said first chip has a first surface, said second chip has a second surface, said first surface and said second surface are two surfaces facing to each other, wherein at least one metal pillar is formed on at least one of said first surface and said second surface and connected with the other, at least one protection ring is formed on at least one of said first surface and said second surface and having a first gap with the other, and at least one electrical device is formed on at least one of said first surface and said second surface, wherein said at least one electrical device is located inside at least one of said at least one protection ring.Type: GrantFiled: May 5, 2016Date of Patent: October 22, 2019Assignee: WIN SEMICONDUCTORS CORP.Inventors: Pei-Chun Liao, Po-Wei Ting, Chih-Feng Chiang, Yu-Kai Wu, Yu-Fan Chang, Re-Ching Lin, Shu-Hsiao Tsai, Cheng-Kuo Lin
-
Patent number: 10298203Abstract: A chip stack having a protection structure for semiconductor device package comprises a first chip and a second chip stacked with each other. A first surface of the first chip and a second surface of the second chip are facing to each other. At least one metal pillar is formed on at least one of the first surface and the second surface and connected with the other. At least one protection ring is formed on at least one of the first surface and the second surface and having a first gap with the other. At least one electrical device is formed on at least one of the first surface and the second surface and is located inside at least one of the at least one protection ring, wherein the at least one electrical device includes a temperature sensor.Type: GrantFiled: March 30, 2017Date of Patent: May 21, 2019Assignee: WIN SEMICONDUCTORS CORP.Inventors: Pei-Chun Liao, Po-Wei Ting, Chih-Feng Chiang, Yu-Kai Wu, Yu-Fan Chang, Re-Ching Lin, Shu-Hsiao Tsai, Cheng-Kuo Lin
-
Publication number: 20170203959Abstract: A chip stack having a protection structure for semiconductor device package comprises a first chip and a second chip stacked with each other. A first surface of the first chip and a second surface of the second chip are facing to each other. At least one metal pillar is formed on at least one of the first surface and the second surface and connected with the other. At least one protection ring is formed on at least one of the first surface and the second surface and having a first gap with the other. At least one electrical device is formed on at least one of the first surface and the second surface and is located inside at least one of the at least one protection ring, wherein the at least one electrical device includes a temperature sensor.Type: ApplicationFiled: March 30, 2017Publication date: July 20, 2017Inventors: PEI-CHUN LIAO, PO-WEI TING, CHIH-FENG CHIANG, YU-KAI WU, YU-FAN CHANG, RE-CHING LIN, SHU-HSIAO TSAI, CHENG-KUO LIN
-
Publication number: 20170162518Abstract: A chip stack having a protection structure for semiconductor device package, which comprises a first chip and a second chip stacked with each other, wherein said first chip has a first surface, said second chip has a second surface, said first surface and said second surface are two surfaces facing to each other, wherein at least one metal pillar is formed on at least one of said first surface and said second surface and connected with the other, at least one protection ring is formed on at least one of said first surface and said second surface and having a first gap with the other, and at least one electrical device is formed on at least one of said first surface and said second surface, wherein said at least one electrical device is located inside at least one of said at least one protection ring.Type: ApplicationFiled: May 5, 2016Publication date: June 8, 2017Inventors: PEI-CHUN LIAO, PO-WEI TING, CHIH-FENG CHIANG, YU-KAI WU, YU-FAN CHANG, RE-CHING LIN, SHU-HSIAO TSAI, CHENG-KUO LIN
-
Patent number: 8722454Abstract: A method for manufacturing an organic electronic component is provided. The method includes steps of providing a substrate and an organic material; coating the organic material onto the substrate; heating the substrate to form a first carrier transport layer; doping a material having a metal ion to an organic solvent to form an organic solution; and applying the organic solution onto the first carrier transport layer to form a second carrier transport layer.Type: GrantFiled: November 5, 2012Date of Patent: May 13, 2014Assignee: National Chiao Tung UniversityInventors: Hsin-Fei Meng, Hao-Wu Lin, Sheng-Fu Horng, Hsiao-Wen Zan, Hao-Wen Chang, Yu-Fan Chang, Yu-Chian Chiu
-
Publication number: 20140045298Abstract: A method for manufacturing an organic electronic component is provided. The method includes steps of providing a substrate and an organic material; coating the organic material onto the substrate; heating the substrate to form a first carrier transport layer; doping a material having a metal ion to an organic solvent to form an organic solution; and applying the organic solution onto the first carrier transport layer to form a second carrier transport layer.Type: ApplicationFiled: November 5, 2012Publication date: February 13, 2014Applicant: National Chiao Tung UniversityInventors: Hsin-Fei MENG, Hao-Wu Lin, Sheng-Fu Horng, Hsiao-Wen Zan, Hao-Wen Chang, Yu-Fan Chang, Yu-Chian Chiu
-
Publication number: 20130005077Abstract: A chemical mechanical polishing method is provided. The chemical mechanical polishing method includes steps of providing a plurality of semiconductor elements to be polished, obtaining a respective dimension of the each semiconductor element to be polished, and polishing the each semiconductor element according to the respective dimension thereof.Type: ApplicationFiled: October 26, 2011Publication date: January 3, 2013Applicant: NATION CHIAO TUNG UNIVERSITYInventors: Hsin-Fei Meng, Hsiao-Wen Zan, Sheng-Fu Horng, Hsiu-Yuan Yang, Kuo-Jui Huang, Hao-Wen Chang, Chun-Yu Chen, Yu-Chiang Chao, Yu-Fan Chang, Bo-Jie Chang