Patents by Inventor Yu-Fan Peng

Yu-Fan Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230049938
    Abstract: A semiconductor structure includes a fin extending from a substrate and oriented lengthwise in a first direction, where the fin includes a stack of semiconductor layers, an isolation feature disposed over the substrate and oriented lengthwise in a second direction perpendicular to the first direction, where the isolation feature is disposed adjacent to the fin, and a metal gate structure having a top portion disposed over the stack of semiconductor layers and a bottom portion interleaved with the stack of semiconductor layers. Furthermore, a sidewall of the bottom portion of the metal gate structure is defined by a sidewall of the isolation feature, and the top portion of the metal gate structure laterally extends over a top surface of the isolation feature.
    Type: Application
    Filed: August 12, 2021
    Publication date: February 16, 2023
    Inventors: Yu-Fan Peng, Yuan-Ching Peng, Yu-Bey Wu, Yu-Shan Lu, Hung Yu Lai, Chen-Yu Chen, Wen-Yun Wang, Tang Ming Lee
  • Publication number: 20220393012
    Abstract: A method for manufacturing a semiconductor structure includes forming a fin over a substrate, wherein the fin includes first semiconductor layers and second semiconductor layers alternating stacked. The method also includes forming an isolation feature around the fin, forming a dielectric feature over the isolation feature, forming a cap layer over the fin and the dielectric feature, oxidizing the cap layer to form an oxidized cap layer, forming source/drain features passing through the cap layer and in the fin, removing the second semiconductor layers in the fin to form nanostructures, and forming a gate structure wrapping around the nanostructures.
    Type: Application
    Filed: June 4, 2021
    Publication date: December 8, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Fan PENG, Yuan-Ching PENG, Yu-Bey WU, Yu-Shan LU, Ying-Yan CHEN, Yi-Cheng LI, Szu-Ping LEE
  • Publication number: 20210359095
    Abstract: A semiconductor structure includes a semiconductor substrate; fin active regions protruded above the semiconductor substrate; and a gate stack disposed the fin active regions; wherein the gate stack includes a high-k dielectric material layer, and various metal layers disposed on the high-k dielectric material layer. The gate stack has an uneven profile in a sectional view with a first dimension D1 at a top surface, a second dimension D2 at a bottom surface, and a third dimension D3 at a location between the top surface and the bottom surface, and wherein each of D1 and D2 is greater than D3.
    Type: Application
    Filed: April 2, 2021
    Publication date: November 18, 2021
    Inventors: Chi-Sheng Lai, Yu-Fan Peng, Li-Ting Chen, Yu-Shan Lu, Yu-Bey Wu, Wei-Chung Sun, Yuan-Ching Peng, Kuei-Yu Kao, Shih-Yao Lin, Chih-Han Lin, Pei-Yi Liu, Jing Yi Yan