Patents by Inventor Yu-Fang Chen

Yu-Fang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12278631
    Abstract: A main board, a hot plug control signal generator, and a control signal generating method thereof are provided. The hot plug control signal generator includes a controller and a latch. The controller provides a control signal. The latch is operated based on an operation power to generate a hot plug control signal. The latch sets the hot plug control signal to a disabled first logic value, and latches the hot plug control signal at the first logic value.
    Type: Grant
    Filed: May 29, 2024
    Date of Patent: April 15, 2025
    Assignee: Wiwynn Corporation
    Inventors: Wei-Fang Chang, Yu-Chun Chen, Nan-Huan Lin, Chung-Hui Yen, Shi-Rui Chen
  • Publication number: 20250098555
    Abstract: A spatial light modulator device includes an array of spatial light modulator cells located over a substrate. Each of the spatial light modulator cells includes: a layer stack including a phase change material plate, a spacer dielectric material plate that underlies the phase change material plate, and a metallic heater plate underlying the spacer dielectric material plate and including outer sidewalls; and a pair of bottom electrode via structures contacting a respective surface segment of a bottom surface of the metallic heater plate. Each of the outer sidewalls of the metallic heater plate is vertically coincident with a respective sidewall of the spacer dielectric material plate and with a respective sidewall of the phase change material plate.
    Type: Application
    Filed: March 18, 2024
    Publication date: March 20, 2025
    Inventors: Chang-Chih Huang, Yu-Wen Wang, Wei-Fang Chen, Han-Yu Chen, Kuo-Chyuan Tzeng
  • Publication number: 20250095724
    Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.
    Type: Application
    Filed: December 2, 2024
    Publication date: March 20, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hsien Huang, Yu-Tse Kuo, Shu-Ru Wang, Li-Ping Huang, Yu-Fang Chen, Chun-Yen Tseng, Tzu- Feng Chang, Chun-Chieh Chang
  • Publication number: 20250087543
    Abstract: An integrated circuit package and the method of forming the same are provided. The integrated circuit package may include a first die having a first substrate and a first through via extending through the first substrate, a first gap-fill layer along a sidewall of the first substrate, an isolation layer on a surface of the first substrate and a surface of the first gap-fill layer, a first bonding layer over the isolation layer, and a first bonding pad in the first bonding layer. The isolation layer may overlap an interface between the sidewall of the first substrate and a sidewall of the first gap-fill layer, and may extend on sidewalls of the first through via.
    Type: Application
    Filed: January 2, 2024
    Publication date: March 13, 2025
    Inventors: Yi-Hsiu Chen, Chia-Fang Tsai, Ming-Yun Liao, Yu-Chian Chiang
  • Patent number: 12248637
    Abstract: The present invention discloses a method for outputting a command by detecting a movement of an object, which includes the following steps. First, an image capturing device captures images generated by the movement of the object at different timings by. Next, a motion trajectory is calculated according to the plurality of images. Further next, a corresponding command is outputted according to the motion trajectory. The present invention also provides a system which employs the above-mentioned method.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: March 11, 2025
    Assignee: PIXART IMAGING INCORPORATION
    Inventors: Yu-Hao Huang, Yi-Fang Lee, Ming-Tsan Kao, Nien-Tse Chen
  • Publication number: 20250058324
    Abstract: An automated molecular operating system includes at least one centrifuge tube carrying module, a transport module, a plurality of temperature control modules, a capping module, a magnetic field module and an automated processing module. The automated processing module is electrically connected to the transport module, the temperature control modules, the capping module and the magnetic field module, and controls the transport module to move the centrifuge tube carrying module, so that a centrifuge tube contained in the centrifuge tube carrying module makes a reaction in the temperature control modules, and the magnetic field module or the capping module is provided to the centrifuge tube according to requirements, such that a specimen in the centrifuge tube can be automatically subjected to nucleic acid extraction, nucleic acid amplification, primer labeling, reverse transcription or a combination thereof, thereby reducing manual operation errors and increasing the ease of operation.
    Type: Application
    Filed: November 17, 2023
    Publication date: February 20, 2025
    Inventors: Yi-Fang CHEN, Suz-Kai HSIUNG, Chun-Wei HUANG, Yin-Lin LI, Yu-Ying WU
  • Patent number: 12224001
    Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: February 11, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hsien Huang, Yu-Tse Kuo, Shu-Ru Wang, Li-Ping Huang, Yu-Fang Chen, Chun-Yen Tseng, Tzu-Feng Chang, Chun-Chieh Chang
  • Publication number: 20240161818
    Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 16, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hsien Huang, Yu-Tse Kuo, Shu-Ru Wang, Li-Ping Huang, Yu-Fang Chen, Chun-Yen Tseng, Tzu-Feng Chang, Chun-Chieh Chang
  • Patent number: 11915755
    Abstract: A layout of a semiconductor memory device includes a substrate and a ternary content addressable memory (TCAM). The TCAM is disposed on the substrate and includes a plurality of TCAM bit cells, where at least two of the TCAM bit cells are mirror-symmetrical along an axis of symmetry, and each of the TCAM bit cells includes two storage units electrically connected to two word lines respectively, and a logic circuit electrically connected to the storage units. The logic circuit includes two first reading transistors, and two second reading transistors, where each of the second reading transistors includes a gate and source and drain regions, the source and drain regions of the second reading transistors are electrically connected to two matching lines and the first reading transistors, respectively, where the word lines are disposed parallel to and between the matching lines.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: February 27, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Yu-Tse Kuo, Shu-Ru Wang, Chun-Hsien Huang, Hsin-Chih Yu, Meng-Ping Chuang, Li-Ping Huang, Yu-Fang Chen
  • Patent number: 11730305
    Abstract: The disclosure relates to an extraction device for extracting soluble favors from raw materials that are distributed within liquid. The extraction device includes a first container, a second container, a valve, and an air suction device. The second container is configured for storing the mixture of the raw materials and the liquid. The valve is connected to the second container and the first container. The air suction device is connected to the first container and configured to decrease the internal pressure of the first container to a predetermined value. When the internal pressure of the first container reaches the predetermined value, the valve is activated to connect the first container to the second container. The disclosure also relates to an extracting method for using the extraction device.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: August 22, 2023
    Assignee: WISTRON CORP.
    Inventors: Pei-Ling Lai, Chao Hsuan Chiu, Ying Lun Hsu, Yu-Fang Chen, Chia Ming Liang, Yu-Kai Su
  • Publication number: 20230197153
    Abstract: A layout of a semiconductor memory device includes a substrate and a ternary content addressable memory (TCAM). The TCAM is disposed on the substrate and includes a plurality of TCAM bit cells, where at least two of the TCAM bit cells are mirror-symmetrical along an axis of symmetry, and each of the TCAM bit cells includes two storage units electrically connected to two word lines respectively, and a logic circuit electrically connected to the storage units. The logic circuit includes two first reading transistors, and two second reading transistors, where each of the second reading transistors includes a gate and source and drain regions, the source and drain regions of the second reading transistors are electrically connected to two matching lines and the first reading transistors, respectively, where the word lines are disposed parallel to and between the matching lines.
    Type: Application
    Filed: January 20, 2022
    Publication date: June 22, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Yu-Tse Kuo, Shu-Ru Wang, Chun-Hsien Huang, Hsin-Chih Yu, Meng-Ping Chuang, Li-Ping Huang, Yu-Fang Chen
  • Publication number: 20220059456
    Abstract: An antifuse structure includes an active area, a gate electrode and a dielectric layer. The gate electrode is over the active area, in which the gate electrode is ring-shaped, and a portion of the gate electrode is overlapped with a portion of the active area in a vertical projection direction, and the portion of the active area has a dopant concentration higher than a dopant concentration of another portion of the active area. The dielectric layer is sandwiched between the portion of the active area and the portion of the gate electrode.
    Type: Application
    Filed: August 18, 2020
    Publication date: February 24, 2022
    Inventors: Chin-Ling HUANG, Yu-Fang CHEN, Chun-Hsien LIN, Chia-Ping LIAO
  • Patent number: 11257756
    Abstract: An antifuse structure includes an active area, a gate electrode and a dielectric layer. The gate electrode is over the active area, in which the gate electrode is ring-shaped, and a portion of the gate electrode is overlapped with a portion of the active area in a vertical projection direction, and the portion of the active area has a dopant concentration higher than a dopant concentration of another portion of the active area. The dielectric layer is sandwiched between the portion of the active area and the portion of the gate electrode.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: February 22, 2022
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chin-Ling Huang, Yu-Fang Chen, Chun-Hsien Lin, Chia-Ping Liao
  • Publication number: 20200345169
    Abstract: The disclosure relates to an extraction device for extracting soluble favors from raw materials that are distributed within liquid. The extraction device includes a first container, a second container, a valve, and an air suction device. The second container is configured for storing the mixture of the raw materials and the liquid. The valve is connected to the second container and the first container. The air suction device is connected to the first container and configured to decrease the internal pressure of the first container to a predetermined value. When the internal pressure of the first container reaches the predetermined value, the valve is activated to connect the first container to the second container. The disclosure also relates to an extracting method for using the extraction device.
    Type: Application
    Filed: December 11, 2019
    Publication date: November 5, 2020
    Inventors: PEI-LING LAI, CHAO HSUAN CHIU, YING LUN HSU, YU-FANG CHEN, CHIA MING LIANG, YU-KAI SU
  • Patent number: 9551587
    Abstract: The present disclosure discloses a navigation device and a navigation method. The navigation method includes a satellite signal receiving module of the navigation device for receiving a positioning signal, a control unit of the navigation device for controlling a display module to display a navigation map on a map region according to the positioning signal, and the control unit of the navigation device for controlling a prompt region to present prompt information with different light effects according to traffic information. The prompt region is located outside the map region. Therefore, it is unnecessary for the user to further pay too much cognitive attention on understanding or referring to the navigation images and instructions, so the driving safety can be ensured.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: January 24, 2017
    Assignee: Wistron Corporation
    Inventors: Chin-Hua Chen, Ching-Yuan Chuang, Hui-Ju Lin, Chien-Chi Shen, Wei-Chu Chen, I-Tan Su, Yu-Fang Chen, Hung-Yang Hsu, Chia-Chih Chen, Cheng-Lan Lee, Pei-Chen Chin
  • Publication number: 20140316696
    Abstract: The present disclosure discloses a navigation device and a navigation method. The navigation method includes a satellite signal receiving module of the navigation device for receiving a positioning signal, a control unit of the navigation device for controlling a display module to display a navigation map on a map region according to the positioning signal, and the control unit of the navigation device for controlling a prompt region to present prompt information with different light effects according to traffic information. The prompt region is located outside the map region. Therefore, it is unnecessary for the user to further pay too much cognitive attention on understanding or referring to the navigation images and instructions, so the driving safety can be ensured.
    Type: Application
    Filed: July 1, 2014
    Publication date: October 23, 2014
    Inventors: Chin-Hua Chen, Ching-Yuan Chuang, Hui-Ju Lin, Chien-Chi Shen, Wei-Chu Chen, I-Tan Su, Yu-Fang Chen, Hung-Yang Hsu, Chia-Chih Chen, Cheng-Lan Lee, Pei-Chen Chin
  • Patent number: 8825390
    Abstract: The present disclosure discloses a navigation device and a navigation method. The navigation method includes a satellite signal receiving module of the navigation device for receiving a positioning signal, a control unit of the navigation device for controlling a display module to display a navigation map on a map region according to the positioning signal, and the control unit of the navigation device for controlling a prompt region to present prompt information with different light effects according to traffic information. The prompt region is located outside the map region. Therefore, it is unnecessary for the user to further pay too much cognitive attention on understanding or referring to the navigation images and instructions, so the driving safety can be ensured.
    Type: Grant
    Filed: March 20, 2013
    Date of Patent: September 2, 2014
    Assignee: Wistron Corporation
    Inventors: Chin-Hua Chen, Ching-Yuan Chuang, Hui-Ju Lin, Chien-Chi Shen, Wei-Chu Chen, I-Tan Su, Yu-Fang Chen, Hung-Yang Hsu, Chia-Chih Chen, Cheng-Lan Lee, Pei-Chen Chin
  • Patent number: RE47727
    Abstract: A system for splitting a display zone of a screen is installed in an electronic device having a screen, and includes a detecting module for detecting screen pixels. A splitting processor receives a splitting instruction containing a splitting number n, and splits the display zone into a main display region and a number (n?1) of extension display regions. A total number of width pixels of adjacent ones of the main and extension display regions from left to right of the display zone equals the number of width pixels of the screen. A total number of height pixels of adjacent ones of the main and extension display regions from top to bottom of the display zone equals the number of height pixels of the screen. A display module displays two or more operating interfaces, files, and/or pages of at least one application in the main and extension display regions, respectively.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: November 12, 2019
    Assignee: Wistron Corporation
    Inventors: Li-Hsuan Chen, Hung-Yang Hsu, Jia-Sheng Wong, Yi-Lang Chi, Yu-Fang Chen, Chang-Chih Han
  • Patent number: D1063950
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: February 25, 2025
    Assignee: VIVOTEK INC.
    Inventors: Kuan-Hung Chen, Kai-Sheng Chuang, Chia-Chi Chang, Yu-Fang Huang, Kai-Ting Yu, Wen-Chun Chen, Shu-Jung Hsu, Tsao-Wei Hung
  • Patent number: D1067237
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: March 18, 2025
    Assignee: VIVOTEK INC.
    Inventors: Kuan-Hung Chen, Kai-Sheng Chuang, Chia-Chi Chang, Yu-Fang Huang, Kai-Ting Yu, Wen-Chun Chen