Abstract: A liquid storage tank includes a housing, a piston located in the housing, a cover, an elastic element, and an outlet pipe. The cover is attached to the housing and has a support post extending toward the piston. The piston, the housing, and the cover define a tank chamber. The tank chamber is filled with cooling liquid. The elastic element is connected with the tank hosing and the piston. The elastic element is free from contact with the cooling liquid. The outlet pipe communicates with the tank chamber. An extension direction of an opening of the outlet pipe is not parallel to a direction of movement of the elastic element. When the cooling liquid is decreased, the piston compressed the tank chamber such that the elastic element is released. The tank chamber is continuously compressed by pairing the elastic element and the piston.

Abstract: A semiconductor structure and a method of fabricating therefor are disclosed. A second contact pad (500) is arranged lateral to a first contact pad (420) in an interconnect structure (400). As a result, during fabrication of the interconnect structure (400), the first contact pad (420) will not be present alone in a large bland area, due to the presence of the second contact pad (500). Thus, a pattern feature for the first contact pad (420) will not be over-resolved, increasing formation accuracy of the first contact pad (420) and thus guaranteeing good electrical transmission performance of the resulting interconnect structure (400).

Abstract: A modulation device including a plurality of electronic elements, at least one first signal line and a first driving circuit is provided. The at least one first signal line is respectively electrically connected to at least one of the electronic elements. The first driving circuit is electrically connected to the at least one first signal line. The first driving circuit provides a first signal to at least one of the at least one first signal line. The first signal includes a first pulse. The first pulse includes a first section and a second section closely adjacent to the first section.

Abstract: An electronic device and a related tiled electronic device are disclosed. The electronic device includes a protective layer, a circuit structure, a sensing element and a control unit. The circuit structure is disposed on the protective layer and surrounds the sensing element. The control unit is disposed between the circuit structure and the protective layer and electrically connected to the sensing element. The protective layer surrounds the control unit and contacts a surface of the circuit structure.

Abstract: A layout of a semiconductor memory device includes a substrate and a ternary content addressable memory (TCAM). The TCAM is disposed on the substrate and includes a plurality of TCAM bit cells, where at least two of the TCAM bit cells are mirror-symmetrical along an axis of symmetry, and each of the TCAM bit cells includes two storage units electrically connected to two word lines respectively, and a logic circuit electrically connected to the storage units. The logic circuit includes two first reading transistors, and two second reading transistors, where each of the second reading transistors includes a gate and source and drain regions, the source and drain regions of the second reading transistors are electrically connected to two matching lines and the first reading transistors, respectively, where the word lines are disposed parallel to and between the matching lines.

Abstract: A method for making a middle-of-line interconnect structure in a semiconductor device includes forming, near a surface of a first interconnect structure comprised of a first metal, a region of varied composition including the first metal and a second element. The method further includes forming a recess within the region of varied composition. The recess laterally extends a first distance along the surface and vertically extends a second distance below the first surface. The method further includes filling the recess with a second metal to form a second interconnect structure that contacts the first interconnect structure.

Abstract: A method for making a middle-of-line interconnect structure in a semiconductor device includes forming, near a surface of a first interconnect structure comprised of a first metal, a region of varied composition including the first metal and a second element. The method further includes forming a recess within the region of varied composition. The recess laterally extends a first distance along the surface and vertically extends a second distance below the first surface. The method further includes filling the recess with a second metal to form a second interconnect structure that contacts the first interconnect structure.

Abstract: A connecting structure includes a substrate, a first conductive feature, a second conductive feature, a third conductive feature over the first conductive feature, and a fourth conductive feature over the second conductive feature. The substrate includes a first region and a second region. The first conductive feature is disposed in the first region and has a first width. The second conductive feature is disposed in the second region and has a second width greater than the first width of the first conductive feature. The third conductive feature includes a first anchor portion surrounded by the first conductive feature. The fourth conductive feature includes a second anchor portion surrounded by the second conductive feature. A depth difference ratio between a depth of the first anchor portion and a depth of the second anchor portion is less than approximately 10%.

Abstract: A method for making a middle-of-line interconnect structure in a semiconductor device includes forming, near a surface of a first interconnect structure comprised of a first metal, a region of varied composition including the first metal and a second element. The method further includes forming a recess within the region of varied composition. The recess laterally extends a first distance along the surface and vertically extends a second distance below the first surface. The method further includes filling the recess with a second metal to form a second interconnect structure that contacts the first interconnect structure.

Abstract: A connecting structure includes a substrate, a first conductive feature, a second conductive feature, a third conductive feature over the first conductive feature and a fourth conductive feature over the second conductive feature. The substrate includes a first region and a second region. The first conductive feature is disposed in the first region and has a first width. The second conductive feature is disposed in the second region and has a second width greater than the first width of the first conductive feature. The third conductive feature includes a first anchor portion surrounded by the first conductive feature. The fourth conductive feature includes a second anchor portion surrounded by the second conductive feature. A depth difference ratio between a depth of the first anchor portion and a depth of the second anchor portion is less than approximately 10%.

Abstract: An electrode and a lithium-ion battery employing the electrode are provided. The electrode includes an active layer, a conductive layer, and a non-conductive layer. The conductive layer is disposed on the top surface of the active layer. The conductive layer includes a first porous film and a conductive lithiophilic material, and the conductive lithiophilic material is within the first porous film and covers the inner surface of the first porous film. The non-conductive layer includes a second porous film and a non-conductive lithiophilic material, and the non-conductive lithiophilic material is within the second porous film and covers the inner surface of the second porous film. The conductive layer is disposed between the active layer and the non-conductive layer. The binding energy (?G) of the lithiophilic material with lithium is less than or equal to ?2.6 eV.

Abstract: A connecting structure includes a substrate, a first conductive feature, a second conductive feature, a third conductive feature over the first conductive feature and a fourth conductive feature over the second conductive feature. The substrate includes a first region and a second region. The first conductive feature is disposed in the first region and has a first width. The second conductive feature is disposed in the second region and has a second width greater than the first width of the first conductive feature. The third conductive feature includes a first anchor portion surrounded by the first conductive feature. The fourth conductive feature includes a second anchor portion surrounded by the second conductive feature. A depth difference ratio between a depth of the first anchor portion and a depth of the second anchor portion is less than approximately 10%.

Abstract: An electrode and a lithium-ion battery employing the electrode are provided. The electrode includes an active layer, a conductive layer, and a non-conductive layer. The conductive layer is disposed on the top surface of the active layer. The conductive layer includes a first porous film and a conductive lithiophilic material, and the conductive lithiophilic material is within the first porous film and covers the inner surface of the first porous film. The non-conductive layer includes a second porous film and a non-conductive lithiophilic material, and the non-conductive lithiophilic material is within the second porous film and covers the inner surface of the second porous film. The conductive layer is disposed between the active layer and the non-conductive layer. The binding energy (?G) of the lithiophilic material with lithium is less than or equal to ?2.6 eV.

Abstract: A method of treating ovarian, tubal and peritoneal cancer is revealed. It comprises administering an effective amount of a pharmaceutical composition (including a copper chelator, a platinum-based chemotherapeutic agent and an anthracycline) to a subject in need thereof for reducing concentration of intracellular copper ions and promoting activation of transcription factor Sp1 and human copper transporter 1 (hCTR1).

Abstract: The present invention provides a method for regulating aldehyde dehydrogenase 1 (ALDH1) comprises administering all-trans retinoic acid to a subject. Further, the present invention also provides a method for treating solid malignancy comprises administering all-trans retinoic acid to a subject, providing a new choice in current cancer treatment.

Abstract: A method of treating ovarian, tubal and peritoneal cancer is revealed. It comprises administering an effective amount of a pharmaceutical composition (including a copper chelator, a platinum-based chemotherapeutic agent and an anthracycline) to a subject in need thereof for reducing concentration of intracellular copper ions and promoting activation of transcription factor Sp1 and human copper transporter 1 (hCTR1).

Abstract: A lighting fixture includes a body and a light emitting unit; the body being provided with a magnetic attraction device comprised a magnetic member with permanent permeability and a control member to control direction of magnetic filed lines from the magnetic member for it to provide attraction force or not; the lighting fixture being attached to a metallic surface when attraction force is provided or disengaged from the metallic surface by changing the direction of those magnetic force lines in the magnetic member.