Abstract: The present invention relates to a multi-chip package structure, comprising a first substrate, a first chip, a sub-package and a first molding compound. The first chip is attached to the first substrate. The first molding compound encapsulates the first chip, the sub-package and the top surface of the first substrate. The bottom surface of the sub-package is attached to the first chip. The sub-package comprises a second substrate, a second chip and a second molding compound. The second substrate has a top surface and a bottom surface, and is electrically connected to the first chip. The second chip is attached to the top surface of the second substrate to which the second chip is electrically connected. The second molding compound encapsulates the second chip and part of the top surface of the second substrate. Whereby, the relative large area caused by the parallel arrangement of a plurality of conventional package structures can be reduced, and there is no need to redesign signal-transmitting path.

Abstract: A method of manufacturing a package is disclosed. The manufacturing method includes the steps of providing a substrate having an opening, disposing a metal slice on a bottom surface of the substrate to cover the opening and bond pads on the bottom surface of the substrate, disposing a die on the metal slice inside the opening or above the top surface of the substrate outside the opening, forming a number of bond wires between the top surface of the die and the top surface of the substrate to electrically connect the die to the substrate, forming an encapsulating mold compound to cover the die, the bond wires, and a part of the top surface of the substrate, removing a part of the metal slice to form a metal heat slug thermally connected to the die and to expose the bond pads, and forming a number of solder balls on the exposed bond pads.

Abstract: A stacked chip-packaging structure consisting of a plurality of chip-packaging units is provided. Each of the chip-packaging units includes a substrate, a chip, a plurality of wires, a molding compound, and a plurality of solder balls. The chip-packaging units are, for example, of a BGA structure with high pin count, and are stacked up one over another and electrically connected through solder balls. With such structural features, the space that the stacked chip-packaging structure occupies is reduced and consequently the entire structure can be miniaturized.

Abstract: A manufacturing method of a ball grid array package mainly comprises providing a carrier unit with an upper surface and a lower surface, mounting a plurality of solder balls on the lower surface of the carrier unit, disposing a protective layer below the lower surface to cover the solder balls, placing a chip on the upper surface of the carrier unit and electrically connecting the carrier and the chip, encapsulating the chip and removing the protective layer so as to form said ball grid array package.

Abstract: The present invention relates to a multi-chip package structure, comprising a first substrate, a first chip, a sub-package and a first molding compound. The first chip is attached to the first substrate. The first molding compound encapsulates the first chip, the sub-package and the top surface of the first substrate. The bottom surface of the sub-package is attached to the first chip. The sub-package comprises a second substrate, a second chip and a second molding compound. The second substrate has a top surface and a bottom surface, and is electrically connected to the first chip. The second chip is attached to the top surface of the second substrate to which the second chip is electrically connected. The second molding compound encapsulates the second chip and part of the top surface of the second substrate. Whereby, the relative large area caused by the parallel arrangement of a plurality of conventional package structures can be reduced, and there is no need to redesign signal-transmitting path.

Abstract: The present invention relates to a multi-chip package structure, comprising a first substrate, a first chip, a sub-package and a first molding compound. The first chip is attached to the first substrate. The first molding compound encapsulates the first chip, the sub-package and the top surface of the first substrate. The bottom surface of the sub-package is attached to the first chip. The sub-package comprises a second substrate, a second chip and a second molding compound. The second substrate has a top surface and a bottom surface, and is electrically connected to the first chip. The second chip is attached to the top surface of the second substrate to which the second chip is electrically connected. The second molding compound encapsulates the second chip and part of the top surface of the second substrate. Whereby, the relative large area caused by the parallel arrangement of a plurality of conventional package structures can be reduced, and there is no need to redesign signal-transmitting path.

Abstract: The present invention relates to a multi-chip package structure, comprising a first substrate, a first chip, a sub-package and a first molding compound. The first chip is attached to the first substrate. The first molding compound encapsulates the first chip, the sub-package and the top surface of the first substrate. The bottom surface of the sub-package is attached to the first chip. The sub-package comprises a second substrate, a second chip and a second molding compound. The second substrate has a top surface and a bottom surface, and is electrically connected to the first chip. The second chip is attached to the top surface of the second substrate to which the second chip is electrically connected. The second molding compound encapsulates the second chip and part of the top surface of the second substrate. Whereby, the relative large area caused by the parallel arrangement of a plurality of conventional package structures can be reduced, and there is no need to redesign signal-transmitting path.

Abstract: A manufacturing method of a ball grid array package mainly comprises providing a carrier unit with an upper surface and a lower surface, mounting a plurality of solder balls on the lower surface of the carrier unit, disposing a protective layer below the lower surface to cover the solder balls, placing a chip on the upper surface of the carrier unit and electrically connecting the carrier and the chip, encapsulating the chip and removing the protective layer so as to form said ball grid array package.

Abstract: A stacked chip-packaging structure consisting of a plurality of chip-packaging units is provided. Each of the chip-packaging units includes a substrate, a chip, a plurality of wires, a molding compound, and a plurality of solder balls. The chip-packaging units are, for example, of a BGA structure with high pin count, and are stacked up one over another and electrically connected through solder balls. With such structural features, the space that the stacked chip-packaging structure occupies is reduced and consequently the entire structure can be miniaturized.

Abstract: A method of manufacturing a package is disclosed. The manufacturing method includes the steps of providing a substrate having an opening, disposing a metal slice on a bottom surface of the substrate to cover the opening and bond pads on the bottom surface of the substrate, disposing a die on the metal slice inside the opening or above the top surface of the substrate outside the opening, forming a number of bond wires between the top surface of the die and the top surface of the substrate to electrically connect the die to the substrate, forming an encapsulating mold compound to cover the die, the bond wires, and a part of the top surface of the substrate, removing a part of the metal slice to form a metal heat slug thermally connected to the die and to expose the bond pads, and forming a number of solder balls on the exposed bond pads.

Abstract: A method of making a wire connection in a semiconductor device, the method comprising: (a) forming an under bump metallurgy (UBM) over a chip including the bonding pad formed thereon; (b) forming a gold bump on the UBM at a location corresponding to the bonding pad; (c) etching the UBM with the gold bump as a mask; and (d) connecting one end of a bonding wire to a conductive lead by ball bonding and the other end thereof to the gold bump on the bonding pad of the chip by stitch bonding. The conductive lead is located external to the chip as a part of a lead frame or a substrate. Alternatively, the semiconductor chip having bumps may be formed by electroless plating a nickel layer on the bonding pads of the chip, and followed by electroless plating a gold layer on the nickel layer. It is noted that the semiconductor chip having metal bumps is formed by wafer bumping process.

Abstract: The ball bump mainly includes a body and a protrusion. The protrusion is located at the upper of the body and essentially consists of a flat upper surface with an annular inclination. The flat upper surface and the annular inclination together define the area for wire bonding.

Abstract: The ball bump mainly includes a body and a protrusion. The protrusion is located at the upper of the body and essentially consists of a flat upper surface with an annular inclination. The flat upper surface and the annular inclination together define the area for wire bonding.

Abstract: A thermal board is used for bonding wires in semiconductor manufacturing process for providing high temperature to increase the wire bonding efficiency while preventing the die paddle of a lead frame from being oxidized. The thermal board has a base board and a platform disposed on the base board. The platform has a center portion defined therein a chamber to receive the die paddle. A plurality of supporting posts are formed on the bottom of the chamber to support the die paddle so that the die paddle does not directly contact with the bottom of the chamber.

Abstract: A ball bonding method on a chip mainly comprises steps of: a wire is burned to form a ball on a capillary; the capillary is moved down to a second bonding point for ball bonding; and the capillary is moved up in a vertical direction thereby pulling the tip of the ball to be cut such that the ball has a uniformly body shape and tip height. Therefore, the ball provides uniform body shape and tip height for wire bonding at a second bonding point under lower variability conditions thus increasing the reliability of products.

Abstract: A method of making low profile wire connection comprising steps of: connecting a wire to a first bonding point, moving a capillary straight up a first length, moving the capillary away from a second bonding point thus making the first reverse action to bend the wire in an appropriate angle so as to form the first bent point, again raising the capillary a second length, again moving the capillary in the direction of the second bonding point to bend the wire in an appropriate angle so as to form the second bent point, again raising the capillary a third length, moving the capillary to the second bonding point thus making an action to bend the wire in an appropriate angle so as to form the third bent point, raising the capillary a fourth length by feeding out the wire to a length which is enough to make a wire loop, and then moving the capillary down to the second bonding point where the bonding is performed.

Abstract: A stacked dies include a substrate, a lower chip and an upper chip. A plurality of upper wires have the bent portion at the bonding pad of the substrate to reduce the height and increase the strength of the wire so as to increase the reliability of the product and to increase the space between the lower wire and the upper wire for reduction cross talk. A method of making low profile upper wire connection comprising steps of: after an upper wire is connected to a first bonding point, a capillary is moved straight up a first distance, and then the capilairy is moved away from a second bonding point thus making a first reverse action to bend the wire in an appropriate angle so as to form the first bent point. The capillary is again raised a second distance and moved downward a second reverse action to bend the upper wire by an appropriate angle so as to form the second bent point.