Patents by Inventor Yu Han

Yu Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240086014
    Abstract: An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The shielding layers may include shielding structures such as a conductive mesh structure and/or a transparent conductive film. The shielding structures may be actively driven or passively biased. In the active driving scheme, one or more inverting circuits may receive a noise signal from a cathode layer in the display and/or from the shielding structures, invert the received noise signal, and drive the inverted noise signal back onto the shielding structures to prevent any noise from the display from negatively impacting the performance of the touch sensors. In the passive biasing scheme, the shielding structures may be biased to a power supply voltage.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Rungrot Kitsomboonloha, Donggeon Han, Jason N Gomez, Kyung Wook Kim, Nikolaus Hammler, Pei-En Chang, Saman Saeedi, Shih Chang Chang, Shinya Ono, Suk Won Hong, Szu-Hsien Lee, Victor H Yin, Young-Jik Jo, Yu-Heng Cheng, Joyan G Sanctis, Hongwoo Lee
  • Patent number: 11928261
    Abstract: The disclosure provides a display device. The display device includes a display panel and a vibration generating module. The vibration generating module is attached to the display panel and includes a substrate, a circuit layer, and a plurality of vibrators. The circuit layer and the plurality of vibrators are disposed on the substrate, and the plurality of vibrators are electrically connected to the circuit layer.
    Type: Grant
    Filed: October 11, 2022
    Date of Patent: March 12, 2024
    Assignee: Innolux Corporation
    Inventors: Yu-Chia Huang, Yuan-Lin Wu, Hsiao-Lang Lin, Tsung-Han Tsai, Kuan-Feng Lee
  • Patent number: 11929314
    Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsien Huang, Peng-Fu Hsu, Yu-Syuan Cai, Min-Hsiu Hung, Chen-Yuan Kao, Ken-Yu Chang, Chun-I Tsai, Chia-Han Lai, Chih-Wei Chang, Ming-Hsing Tsai
  • Patent number: 11928882
    Abstract: The present invention provides a display device, which includes a frame having an accommodating cavity and a display module disposed in the accommodating cavity. The display module includes a first light source, an optical unit, an imaging unit arranged on a side of the optical unit facing away from the first light source, and a lens array arranged on a side of the imaging unit facing away from the first light source. Corresponding to a preset pattern, light emitted by the first light source passes through the optical unit, the imaging unit and the lens array to form a default floating image in a floating display area outside the accommodating cavity. In addition, the present invention also provides a non-contact key and an input device including the above display module.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: March 12, 2024
    Assignee: DARWIN PRECISIONS CORPORATION
    Inventors: Yu Jen Lai, Ya Han Ko, Yu-Ming Huang, Chia Tsun Huang
  • Publication number: 20240077802
    Abstract: A method of forming a photoresist pattern includes forming a protective layer over a photoresist layer formed on a substrate. The protective layer and the photoresist layer are selectively exposed to actinic radiation. The photoresist layer is developed to form a pattern in the photoresist layer. The protective layer includes a polymer without a nitrogen-containing moiety, and a basic quencher, an organic acid, a photoacid generator, or a thermal acid generator.
    Type: Application
    Filed: August 7, 2023
    Publication date: March 7, 2024
    Inventors: Yu-Chung SU, Tsung-Han KO, Ching-Yu CHANG
  • Publication number: 20240079278
    Abstract: A method includes forming a pad layer. The pad layer includes a first portion over a first part of a semiconductor substrate, and a second portion over a second part of the semiconductor substrate. The first portion has a first thickness, and the second portion has a second thickness smaller than the first thickness. The semiconductor substrate is then annealed to form a first oxide layer over the first part of the semiconductor substrate, and a second oxide layer over the second part of the semiconductor substrate. The pad layer, the first oxide layer, and the second oxide layer are removed. A semiconductor layer is epitaxially grown over and contacting the first part and the second part of the semiconductor substrate.
    Type: Application
    Filed: January 6, 2023
    Publication date: March 7, 2024
    Inventors: Jhih-Yong Han, Wen-Yen Chen, Yi-Ting Wu, Tsai-Yu Huang, Huicheng Chang, Yee-Chia Yeo
  • Publication number: 20240079143
    Abstract: The present disclosure relates to a method for providing biomarker for early detection of Alzheimer's Disease (AD), and particularly to a method that is able to enhance the accuracy of predicting AD from Mild Cognitive Impairment (MCI) patients using the Hippocampus magnetic resonance imaging (MRI) scans and Mini-Mental State Examination (MMSE) data. The providing MRI images containing the anatomical structure of Hippocampus biomarker and MMSE data as a training data set; training a processor using the training data set, and the training comprising acts of receiving MRI images and MMSE data as a testing data set from a target; and classifying the test data by the trained processor to include aggregating predictions.
    Type: Application
    Filed: July 13, 2023
    Publication date: March 7, 2024
    Applicant: National Cheng Kung University
    Inventors: Gwo-Giun LEE, Te-Han KUNG, Tzu-Cheng CHAO, Yu-Min KUO
  • Publication number: 20240076468
    Abstract: An embodiment resin composition for shielding electromagnetic waves, based on a total weight of the resin composition, includes 20 to 80 wt % of thermoplastic resin, 1 to 50 wt % of a conductive filler, and 0.1 to 30 wt % of an additive.
    Type: Application
    Filed: January 16, 2023
    Publication date: March 7, 2024
    Inventors: Seung-Woo Choi, Dong-Bum Seo, Kyun Oh, Yu-Hyun Song, Yang-Jin Kwon, Joo-Han Lee
  • Publication number: 20240078170
    Abstract: A setting method of in-memory computing simulator includes: performing a plurality of test combinations by an in-memory computing device and recording a plurality of first estimation indices corresponding to the plurality of test combinations respectively, wherein each of the plurality of test combinations includes one of a plurality of neural network models and one of a plurality of datasets, executing a simulator according to the plurality of test combinations by a processing device and recording a plurality of second estimation indices corresponding to the plurality of test combinations respectively, wherein the simulator has a plurality of adjustable settings; calculating a correlation sum according to the plurality of first estimation indices and the plurality of second estimation indices by the processing device, and performing an optimal algorithm to search an optimal parameter in the setting space constructed by the plurality of settings so that the correlation sum is maximal.
    Type: Application
    Filed: November 21, 2022
    Publication date: March 7, 2024
    Inventors: Ke-Han Li, Chih-Fan Hsu, Yu-Sheng Lin, Wei-Chao CHEN
  • Publication number: 20240081077
    Abstract: A transistor includes a first semiconductor layer, a second semiconductor layer, a semiconductor nanosheet, a gate electrode and source and drain electrodes. The semiconductor nanosheet is physically connected to the first semiconductor layer and the second semiconductor layer. The gate electrode wraps around the semiconductor nanosheet. The source and drain electrodes are disposed at opposite sides of the gate electrode. The first semiconductor layer surrounds the source electrode, the second semiconductor layer surrounds the drain electrode, and the semiconductor nanosheet is disposed between the source and drain electrodes.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Applicants: Taiwan Semiconductor Manufacturing Company, Ltd., National Yang Ming Chiao Tung University
    Inventors: Po-Tsun Liu, Meng-Han Lin, Zhen-Hao Li, Tsung-Che Chiang, Bo-Feng Young, Hsin-Yi Huang, Sai-Hooi Yeong, Yu-Ming Lin
  • Patent number: 11921101
    Abstract: Disclosed are calibration techniques that can be implemented by a device that conducts biological tests. In certain embodiments, the device for testing a biological specimen includes a receiving mechanism to receive a carrier, a camera module arranged to capture imagery of the carrier, and a processor. Some examples of the processor can detect a calibration mode trigger. In calibration mode, the processor can divide the captured imagery into segments and selectively perform one or more calibration procedures for each segment. Then, the processor records a calibration result for each segment.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: March 5, 2024
    Assignee: Bonraybio Co., Ltd.
    Inventors: Cheng-Teng Hsu, Chih-Pin Chang, Kuang-Li Huang, Yu-Chiao Chi, Chia-Wei Chang, Chiung-Han Wang
  • Patent number: 11922838
    Abstract: A display panel, comprising a first insulating structural layer, a first crack detection line, a second insulating structural layer and a second crack detection line which are sequentially arranged on a substrate, wherein the first crack detection line and the second crack detection line are both located in a peripheral area and are arranged around a display area, one end of the first crack detection line is configured to receive a detection signal, and the other end of the first crack detection line is configured to output a first output signal, and one end of the second crack detection line is configured to receive a detection signal and the other end of the second crack detection line is configured to output a second output signal.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: March 5, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yu Wang, Yi Zhang, Tingliang Liu, Chang Luo, Hao Zhang, Huijuan Yang, Tinghua Shang, Yang Zhou, Pengfei Yu, Shun Zhang, Xiaofeng Jiang, Huijun Li, Linhong Han
  • Patent number: 11923394
    Abstract: In some embodiments, the present disclosure relates to an integrated chip having an inter-layer dielectric (ILD) structure along a first surface of a substrate having a photodetector. An etch stop layer is over the ILD structure, and a reflector is surrounded by the etch stop layer and the ILD structure. The reflector has a curved surface facing the substrate at a location directly over the photodetector. The curved surface is coupled between a first sidewall and a second sidewall of the reflector. The reflector has larger thicknesses along the first sidewall and the second sidewall than at a center of the reflector between the first sidewall and the second sidewall.
    Type: Grant
    Filed: February 9, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Han Huang, Jiech-Fun Lu, Yu-Chun Chen
  • Patent number: 11922044
    Abstract: A solution for deteriorated non-volatile memory is shown. When a controller determines that raw data read from the non-volatile memory is undesirable data, the controller performs safety moving of valid data of an erasure unit that contains the raw data to safely move the valid data of the erasure unit, wherein the erasure unit is a high-risk block, and the raw data in the non-volatile memory is regarded as being in a deteriorated physical address. Prior to being moved in the safety moving, the raw data is changed so that it is different from the undesirable data. In an exemplary embodiment, the undesirable data is all-1's data or all-0's data.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: March 5, 2024
    Assignee: SILICON MOTION, INC.
    Inventors: Yu-Hao Chang, Yu-Han Hsiao, Po-Sheng Chou
  • Publication number: 20240065252
    Abstract: A system includes an acoustic lure and a sensor package disposed within an interior volume of an insect trapping container and a computing device in communication with the acoustic lure and the sensor package configured to instruct the acoustic lure to output an acoustic tone. The computer device is further configured to receive sensor data from the sensor package, the sensor data representative of insects within the interior volume. Responsive to receiving the sensor data, the computing device is configured to instruct an imaging device to capture image data representative of the insects within the interior volume or determine insect count data based on the sensor data. The computing device is configured to then transmit output data to a remote computing system, the output data including at least one of a first portion of the image data or a second portion of the insect count data.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Inventors: Scott Ritche, Kyran M. Staunton, Wei Xiang, Yu Han, Nigel Snoad, Jianyi Liu, Jacob Crawford, Mark Desnoyer
  • Publication number: 20240071136
    Abstract: A vehicle device setting method including: capturing, by an image sensing unit, a first image frame; recognizing a user ID according to the first image frame; showing ID information of the recognized user ID on a screen or by a speaker; capturing a second image frame; generating a confirm signal when a first user expression is recognized by calculating an expression feature in the second image frame and comparing the recognized expression feature with stored expression data associated with a predetermined user expression to confirm whether the recognized user ID is correct or not according to the second image frame captured after the ID information is shown; controlling an electronic device according to the confirm signal; and entering a data update mode instructed by the user and updating setting information of the electronic device by current electronic device setting according to a saving signal generated by confirming a second user expression in a third image frame captured after the user ID is confirmed
    Type: Application
    Filed: November 3, 2023
    Publication date: February 29, 2024
    Inventors: LIANG-CHI CHIU, YU-HAN CHEN, MING-TSAN KAO
  • Publication number: 20240069677
    Abstract: A floating image generation device is disclosed, which includes a light source, an image generation module, and a floating image generation unit. The image generation module is disposed above the light source and includes a shading unit and an image generation unit. The shading unit is capable of changing light transmissivity state. The image generation unit is disposed above the shading unit. The floating image generation unit is disposed above the image generation unit. The light source emits a light passing through the shading unit, the image generation unit, and the floating image generation unit to generate a first floating image when the shading unit is in a first light transmissivity state. The light source emits a light passing through the shading unit, the image generation unit, and the floating image generation unit to generate a second floating image when the shading unit is in a second light transmissivity state.
    Type: Application
    Filed: October 18, 2023
    Publication date: February 29, 2024
    Inventors: CHIH-PING HSU, RAN-SHIOU YOU, YU JEN LAI, YA HAN KO
  • Publication number: 20240071538
    Abstract: The present disclosure provides a multi-state one-time programmable (MSOTP) memory circuit including a memory cell and a programming voltage driving circuit. The memory cell includes a MOS storage transistor, a first MOS access transistor and a second MOS access transistor electrically connected to store two bits of data. When the memory cell is in a writing state, the programming voltage driving circuit outputs a writing control potential to the gate of the MOS storage transistor, and when the memory cell is in a reading state, the programming voltage driving circuit outputs a reading control potential to the gate of the MOS storage transistor.
    Type: Application
    Filed: August 22, 2023
    Publication date: February 29, 2024
    Inventors: CHEN-FENG CHANG, YU-CHEN LO, TSUNG-HAN LU, SHU-CHIEH CHANG, CHUN-HAO LIANG, DONG-YU WU, MENG-LIN WU
  • Publication number: 20240071947
    Abstract: A semiconductor package including a ring structure with one or more indents and a method of forming are provided. The semiconductor package may include a substrate, a first package component bonded to the substrate, wherein the first package component may include a first semiconductor die, a ring structure attached to the substrate, wherein the ring structure may encircle the first package component in a top view, and a lid structure attached to the ring structure. The ring structure may include a first segment, extending along a first edge of the substrate, and a second segment, extending along a second edge of the substrate. The first segment and the second segment may meet at a first corner of the ring structure, and a first indent of the ring structure may be disposed at the first corner of the ring structure.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Inventors: Yu-Ling Tsai, Lai Wei Chih, Meng-Tsan Lee, Hung-Pin Chang, Li-Han Hsu, Chien-Chia Chiu, Cheng-Hung Lin
  • Patent number: 11916155
    Abstract: An optoelectronic package and a method for producing the optoelectronic package are provided. The optoelectronic package includes a carrier, a photonic device, a first encapsulant and a second encapsulant. The photonic device is disposed on the carrier. The first encapsulant covers the carrier and is disposed around the photonic device. The second encapsulant covers the first encapsulant and the photonic device. The first encapsulant has a topmost position and a bottommost position, and the topmost position is not higher than a surface of the photonic device.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: February 27, 2024
    Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATION
    Inventors: Chien-Hsiu Huang, Bo-Jhih Chen, Kuo-Ming Chiu, Meng-Sung Chou, Wei-Te Cheng, Kai-Chieh Liang, Yun-Ta Chen, Yu-Han Wang