Abstract: Two types of blue light blocking contact lenses are provided and are formed by curing different compositions. The first composition includes a blue light blocking component formed by mixing or reacting a first hydrophilic monomer and a yellow dye, a first colored dye component formed by mixing or reacting a second hydrophilic monomer and a first colored dye, at least one third hydrophilic monomer, a crosslinker, and an initiator. The first colored dye includes a green dye, a cyan dye, a blue dye, an orange dye, a red dye, a black dye, or combinations thereof. The second composition includes a blue light blocking component, at least one hydrophilic monomer, a crosslinker, and an initiator. The blue light blocking component is formed by mixing or reacting glycerol monomethacrylate and a yellow dye. Further, methods for preparing the above contact lenses are provided.

Abstract: A method of forming a semiconductor device includes forming a first interconnect structure over a carrier; forming a thermal dissipation block over the carrier; forming metal posts over the first interconnect structure; attaching a first integrated circuit die over the first interconnect structure and the thermal dissipation block; removing the carrier; attaching a semiconductor package to the first interconnect structure and the thermal dissipation block using first electrical connectors and thermal dissipation connectors; and forming external electrical connectors, the external electrical connectors being configured to transmit each external electrical connection into the semiconductor device, the thermal dissipation block being electrically isolated from each external electrical connection.

Abstract: Devices and method for forming a switch including a heater layer including a first heater pad, a second heater pad, and a heater line connecting the first heater pad and the second heater pad, a phase change material (PCM) layer positioned in a same vertical plane as the heater line, and a floating spreader layer including a first portion positioned in the same vertical plane as the heater line and the PCM layer, in which the first portion has a first width that is less than or equal to a distance between proximate sidewalls of the first heater pad and the second heater pad.

Abstract: The disclosure provides a semiconductor structure and a method of forming the same. The semiconductor structure includes a base pattern including a channel region and a drain region, a first semiconductor layer on the channel region of the base pattern, and a gate structure on the first semiconductor layer. The gate structure includes a first stack disposed on the first semiconductor layer and a second stack disposed on the first stack. The first stack includes a first sidewall adjacent to the drain region and a second sidewall opposite to the first sidewall in a first direction parallel to a top surface of the base pattern. The first sidewall is at a first distance from the second stack in the first direction, and the second sidewall is at a second distance from the second stack in the first direction. The first distance is greater than the second distance.

Abstract: A semiconductor structure includes a semiconductor epitaxial layer, a first semiconductor well, a second semiconductor well, a source doped region, a gate structure and a drain structure. The semiconductor epitaxial layer includes a first side and a second side opposite to the first side. The first semiconductor well is located on the first side of the semiconductor epitaxial layer. The second semiconductor well is located on the second side of the semiconductor epitaxial layer. The source doped region is located in the first semiconductor well. The gate structure overlaps the first semiconductor well and the source doped region on the first side of the semiconductor epitaxial layer. The drain structure includes a semiconductor substrate. The second side of the semiconductor epitaxial layer outside the second semiconductor well includes a connecting surface. The connecting surface of the semiconductor epitaxial layer is connected to the semiconductor substrate.

Abstract: A semiconductor device structure is provided. The semiconductor device has a first dielectric wall between an n-type source/drain region and a p-type source/drain region to physically and electrically isolate the n-type source/drain region and the p-type source/drain region from each other. A second dielectric wall is formed between a first channel region connected to the n-type source/drain region and a second channel region connected to the p-type source/drain region. A contact is formed to physically and electrically connect the n-type source/drain region with the p-type source/drain region, wherein the contact extends over the first dielectric wall. The first electric wall has a gradually decreasing width W5 towards a tip of the dielectric wall from a top contact position between the first dielectric wall and either the n-type source/drain region or the p-type source/drain region.

Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.

Abstract: A contact stack of a semiconductor device includes a source/drain feature, a silicide layer wrapping around the source/drain feature, a seed metal layer in direct contact with the silicide layer, and a conductor in contact with the seed metal layer. The contact stack excludes a metal nitride layer in direct contact with the silicide layer.

Abstract: A method of manufacturing a carrying substrate is provided. At least one circuit component is disposed on a first circuit structure. An encapsulation layer is formed on the first circuit structure and encapsulates the circuit component. A second circuit structure is formed on the encapsulation layer and electrically connected to the circuit component. The circuit component is embedded in the encapsulation layer via an existing packaging process. Therefore, the routing area is increased, and a package substrate requiring a large size has a high yield and low manufacturing cost.

Abstract: A solution for deteriorated non-volatile memory is shown. When a controller determines that raw data read from the non-volatile memory is undesirable data, the controller performs safety moving of valid data of an erasure unit that contains the raw data to safely move the valid data of the erasure unit, wherein the erasure unit is a high-risk block, and the raw data in the non-volatile memory is regarded as being in a deteriorated physical address. Prior to being moved in the safety moving, the raw data is changed so that it is different from the undesirable data. In an exemplary embodiment, the undesirable data is all-1's data or all-0's data.

Abstract: The present disclosure provides a multi-state one-time programmable (MSOTP) memory circuit including a memory cell and a programming voltage driving circuit. The memory cell includes a MOS storage transistor, a first MOS access transistor and a second MOS access transistor electrically connected to store two bits of data. When the memory cell is in a writing state, the programming voltage driving circuit outputs a writing control potential to the gate of the MOS storage transistor, and when the memory cell is in a reading state, the programming voltage driving circuit outputs a reading control potential to the gate of the MOS storage transistor.

Abstract: A memory device includes a plurality of memory cells; a word line, connected to one of the plurality of memory cells, that is configured to provide a first WL pulse having a rising edge and a falling edge that define a pulse width of the first WL pulse; a first tracking WL, formed adjacent to the memory cells, that is configured to provide, via being physically or operatively coupled to a bit line (BL) configured to write a logic state to the memory cell, a second WL pulse having a rising edge with a decreased slope; and a first tracking BL, configured to emulate the BL, that is coupled to the first tracking WL such that the pulse width of the first WL pulse is increased based on the decreased slope of the rising edge of the second WL pulse.

Abstract: A solution for deteriorated non-volatile memory is shown. When determining that raw data read from the non-volatile memory is undesirable data, the controller updates a deterioration table to record a deteriorated logical address of the raw data that is the undesirable data. When performing garbage collection from a source block associated with the deteriorated logical address to a destination block and determining that the deteriorated logical address is listed in the deterioration table, the controller invalidates target data stored in the source block and mapped to the deteriorated logical address, without moving the target data from the source block to the destination block in the garbage collection.

Abstract: A solution for deteriorated non-volatile memory is shown. When determining that raw data read from the non-volatile memory is undesirable data, the controller updates a deterioration table to record a deteriorated logical address of the raw data that is the undesirable data. In response to a read request that a host issues to read the non-volatile memory for data of the deteriorated logical address, the controller obtains the deteriorated logical address from the deterioration table and informs the host that deterioration has happened at the deteriorated logical address.

Abstract: A solution for deteriorated non-volatile memory is shown. When determining that raw data read from the non-volatile memory is undesirable data, the controller updates a deterioration table to record a deteriorated logical address of the raw data that is the undesirable data. When performing garbage collection from a source block associated with the deteriorated logical address to a destination block and determining that the deteriorated logical address is listed in the deterioration table, the controller invalidates target data stored in the source block and mapped to the deteriorated logical address, without moving the target data from the source block to the destination block in the garbage collection.

Abstract: A solution for deteriorated non-volatile memory is shown. When a controller determines that raw data read from the non-volatile memory is undesirable data, the controller performs safety moving of valid data of an erasure unit that contains the raw data to safely move the valid data of the erasure unit, wherein the erasure unit is a high-risk block, and the raw data in the non-volatile memory is regarded as being in a deteriorated physical address. Prior to being moved in the safety moving, the raw data is changed so that it is different from the undesirable data. In an exemplary embodiment, the undesirable data is all-1's data or all-0's data.

Abstract: A light emitting diode (LED) package structure includes a first insulating layer, a first conductive pattern, a second insulating layer, a second conductive pattern, an LED element, and a solder material. The first conductive pattern has a first portion and a second portion, the first portion fills a through hole of the first insulating layer, and the second portion is disposed on the first insulating layer. The second insulating layer is disposed on the first insulating layer and covers the first conductive pattern. The second portion of the first conductive pattern is sandwiched between the first insulating layer and the second insulating layer. The second conductive pattern is disposed on the second insulating layer and is electrically connected to the first conductive pattern. The LED element is bonded to the second conductive pattern. The solder material is disposed on the first portion of the first conductive pattern.

Abstract: An optical module and a projection apparatus using the optical module are provided. The optical module includes a base, a first frame, an optical element and at least one driving assembly. The first frame is disposed in the base. The optical element is disposed in the first frame. The at least one driving assembly is disposed between the base and the first frame. The first frame is configured to move relative to the base by a magnetic force generated by the at least one driving assembly. Each of the at least one driving assembly includes a coil and a Halbach array magnet structure, the coil and the Halbach array magnet structure face each other along a first direction, a width of the Halbach array magnet structure in the first direction is W1, and a width of the coil in the first direction is W2, and 0.7?W1/W2?2.

Abstract: A laser stabilizing system configured to stabilize a laser beam emitted from a laser source includes a beam steering device, a first beam splitter, a first light detector, a second beam splitter, and a second light detector. The beam steering device is configured to steer a direction and a position of the laser beam in four or more degrees of freedom. The first beam splitter is configured to split the laser beam from the beam steering device into a first partial beam and a second partial beam. The first light detector is disposed on a transmission path of the first partial beam. The second beam splitter is configured to split the second partial beam into a third partial beam and a fourth partial beam. The second light detector is disposed on a transmission path of the third partial beam. A laser source module is also provided.