Abstract: In some embodiments, the present disclosure relates to an integrated circuit (IC) in which a memory structure comprises an inhibition layer inserted between two ferroelectric layers to create a tetragonal-phase dominant ferroelectric structure. In some embodiments, the ferroelectric structure includes a first ferroelectric layer, a second ferroelectric layer overlying the first ferroelectric layer, and a first inhibition layer disposed between the first and second ferroelectric layers and bordering the second ferroelectric layer. The first inhibition layer is a different material than the first and second ferroelectric layers.

Abstract: Embodiments of improved processes and methods that provide selective etching of silicon nitride are disclosed herein. More specifically, a cyclic, two-step dry etch process is provided to selectively etch silicon nitride layers formed on a substrate, while protecting oxide layers formed on the same substrate. The cyclic, two-step dry etch process sequentially exposes the substrate to: (1) a hydrogen plasma to modify exposed surfaces of the silicon nitride layer and the oxide layer to form a modified silicon nitride surface layer and a modified oxide surface layer, and (2) a halogen plasma to selectively etch silicon nitride by removing the modified silicon nitride surface layer without removing the modified oxide surface layer. The oxide layer is protected from etching during the removal step (i.e., step 2) by creating a crystallized water layer on the oxide layer during the surface modification step (i.e., step 1).

Abstract: A mending method for a display includes the steps of making a display device light to make a plurality of light emitting positions thereof shine, searching out a plurality of defect positions among the light emitting positions, providing a transferring device having a transferring surface with a plurality of miniature light emitting elements positioned correspondingly to the light emitting positions, planning a mending procedure which includes in the area the transferring surface corresponds to, choosing in chief the largest number of defect positions able to be mended at a single time according to the positions of the miniature light emitting elements and then in the area the transferring surface corresponds to, planning the rest of the defect positions according to the rest of the miniature light emitting elements, and according to the mending procedure, moving the transferring device to weld the miniature light emitting elements at the defect positions.

Abstract: A method of processing a substrate that includes: flowing dioxygen (O2) and an adsorbate precursor into a plasma processing chamber that is configured to hold the substrate including an organic layer and a patterned etch mask; sustaining an oxygen-rich plasma while flowing the O2 and the adsorbate precursor, oxygen species from the O2 and the adsorbate precursor reacting under the oxygen-rich plasma to form an adsorbate; and exposing the substrate to the oxygen-rich plasma to form a recess in the organic layer, where the adsorbate forms a sidewall passivation layer in the recess.

Abstract: A method of processing a substrate that includes: flowing an etch gas, O2, and an adsorbate precursor into a plasma processing chamber that is configured to hold the substrate including a silicon-containing dielectric layer and a patterned mask layer, the etch gas including hydrogen and fluorine; generating a plasma in the plasma processing chamber while flowing the etch gas, O2, and the adsorbate precursor, the adsorbate precursor being oxidized to form an adsorbate; and patterning, with the plasma, the silicon-containing dielectric layer on the substrate, where the adsorbate forms a sidewall passivation layer.

Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.

Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.

Abstract: An image sensing device and a control device of an illumination device thereof are provided. The control device includes a control circuit, an operation circuit, and multiple driving signal generators. The control circuit generates multiple control signals. The operation circuit performs a logical operation on the control signals and an image capturing signal to generate multiple operation results. The driving signal generator respectively provides multiple driving signals to the illumination device according to the operation results, and the driving signals respectively have multiple different output powers.

Abstract: A display device includes a display panel. The display panel has a functional display area. The functional display area includes a plurality of display pixels and a plurality of light transmitting regions. The plurality of display pixels are around by the plurality of the light transmitting regions. A boundary between one of the plurality of display pixels and one of the plurality of light transmitting regions comprises an arc segment.

Abstract: A method includes providing a first substrate having a first surface and a second substrate having a second surface, where the first surface and the second surface each include a silicon-based dielectric layer, applying hydrogen plasma to form hydrogen-terminated groups on the silicon-based dielectric layer, applying oxygen plasma to oxidize the silicon-based dielectric layer including the hydrogen-terminated groups, applying nitrogen plasma to the oxidized silicon-based dielectric layer, thereby forming a treated silicon-based dielectric layer, rinsing the treated silicon-based dielectric layer, and coupling the first substrate to the second substrate by physically contacting the rinsed and treated silicon-based dielectric layer on the first surface with the rinsed and treated silicon-based dielectric layer on the second surface.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: A method of processing a substrate includes receiving a substrate including a photoresist film including exposed and unexposed portions, etching parts of the unexposed portions of the photoresist film with a developing gas in a process chamber to leave a residual part of the unexposed portions, and purging the developing gas from the process chamber with a purging gas. After purging the developing gas, the residual part of the unexposed portions is etched with the developing gas. The substrate is etched using exposed portions of the photoresist film as a mask.

Abstract: A method of forming a semiconductor device includes depositing a first layer over a substrate and patterning the first layer using an extreme ultraviolet (EUV) lithography process to form a patterned layer and expose portions of the substrate. The method includes, in a plasma processing chamber, generating a first plasma from a gas mixture including SiCl4 and one or more of argon, helium, nitrogen, and hydrogen. The method includes exposing the substrate to the first plasma to deposit a second layer including silicon over the patterned layer.

Abstract: Selective protection and etching is provided which can be utilized in etching of a silicon containing layer with respect to a Ge or SiGe layer. In an example, the layers are stacked, and an oxide is on a side surface of the layers. A treatment is utilized to provide a modified surface or termination surface on side surfaces of the Ge/SiGe layers, and a heat treatment is provided after the gas treatment to selectively sublimate layer portions on side surfaces of the Si containing layers. The gas treatment and heat treatment are preferably in non-plasma environments. Thereafter, a plasma process is performed to form a protective layer on the Ge containing layers, and the Si containing layers can be etched with the plasma.

Abstract: A method of high-throughput dry etching of a film by proton-mediated catalyst formation. The method includes providing a substrate having a film thereon containing silicon-oxygen components, silicon-nitrogen components, or both, introducing an etching gas in the process chamber, plasma-exciting the etching gas, and exposing the film to the plasma-excited etching gas to etch the film. In one example, the etching gas contains at least three different gases that include a fluorine-containing gas, a hydrogen-containing gas, and a nitrogen-containing gas, plasma-exciting the etching gas. In another example, the etching gas contains at least four different gases that include a fluorine-containing gas, a hydrogen-containing gas, an oxygen-containing gas, and a silicon-containing gas.

Abstract: A method of processing a substrate includes patterning a mask over a dielectric layer and etching openings in the dielectric layer. The dielectric layer is disposed over the substrate. The etching includes flowing an etchant, a polar or H-containing gas, and a phosphorus-halide gas. The method may further include forming contacts by filling the openings with a conductive material.

Abstract: A method for plasma processing that includes: loading a dummy wafer between a focus ring positioned within a plasma process chamber; depositing a material layer over the focus ring by a plasma deposition process within the plasma process chamber; removing the dummy wafer from the plasma process chamber, and loading a substrate to be processed between the focus ring with the material layer within the plasma process chamber and performing a plasma process on the substrate.

Abstract: A method of high-throughput dry etching of a film by proton-mediated catalyst formation. The method includes providing a substrate having a film thereon containing silicon-oxygen components, silicon-nitrogen components, or both, introducing an etching gas in the process chamber, plasma-exciting the etching gas, and exposing the film to the plasma-excited etching gas to etch the film. In one example, the etching gas contains at least three different gases that include a fluorine-containing gas, a hydrogen-containing gas, and a nitrogen-containing gas, plasma-exciting the etching gas. In another example, the etching gas contains at least four different gases that include a fluorine-containing gas, a hydrogen-containing gas, an oxygen-containing gas, and a silicon-containing gas.

Abstract: Substrate processing techniques are described in which an etch protection layer that is formed as part of an etch process forms in a self-limiting nature. Thus, over deposition effects are minimized, particularly in the corners of etched polygonal holes. In one embodiment, the layer being etched contains silicon and the protective layer comprises a silicon oxide (SixOy). The process may include the use of a cyclical series of etch and protective layer formation steps. In the case of a silicon oxide based protective layer, a thin protective layer of silicon oxide may be formed in a limiting and controllable manner due to the nature of the oxygen atom interaction with silicon and newly formed silicon oxide protective layers. In this manner, a polygonal hole may be formed without detrimental over deposition of a protective layer in corners of the hole.