Patents by Inventor Yu-Heng Liu

Yu-Heng Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240124163
    Abstract: A magnetic multi-pole propulsion array system is applied to at least one external cathode and includes a plurality of magnetic multi-pole thrusters connected adjacent to each other. Each magnetic multi-pole thruster includes a propellant provider, a discharge chamber, an anode and a plurality of magnetic components. The propellant provider outputs propellant. The discharge chamber is connected with the propellant provider to accommodate the propellant. The anode is disposed inside the discharge chamber to generate an electric field. The plurality of magnetic components is respectively disposed on several sides of the discharge chamber. One of the several sides of the discharge chamber of the magnetic multi-pole thruster is applied for one side of a discharge chamber of another magnetic multi-pole thruster.
    Type: Application
    Filed: December 19, 2022
    Publication date: April 18, 2024
    Applicant: National Cheng Kung University
    Inventors: Yueh-Heng Li, Yu-Ting Wu, Chao-Wei Huang, Wei-Cheng Lo, Hsun-Chen Hsieh, Ping-Han Huang, Yi-Long Huang, Sheng-Wen Liu, Wei-Cheng Lien
  • Patent number: 11615848
    Abstract: A memory control method, a memory storage device, and a memory control circuit unit are provided. The memory control method includes: programming multiple first memory cells in a first physical erasing unit in a rewritable non-volatile memory module; and applying an electronic pulse to at least one word line in the rewritable non-volatile memory module. The at least one word line is coupled to multiple second memory cells in the first physical erasing unit. The second memory cells include the first memory cells. The electronic pulse is not configured to read, program, or erase the second memory cells.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: March 28, 2023
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Yu-Siang Yang, Wei Lin, An-Cheng Liu, Yu-Heng Liu, Chun-Hsi Lai, Ting-Chien Zhan
  • Publication number: 20230028044
    Abstract: The exemplary embodiments disclose a method, a computer program product, and a computer system for managing environment change. The exemplary embodiments may include determining a plurality of change and risk models for a plurality of computing environments, generating a plurality of association rules based on the plurality of change and risk models, and generating a joint association rule by combining at least two of the plurality of association rules, wherein the joint association rule indicates, from the three dimensions, an association relationship between changes and risk events over at least a part of the time series.
    Type: Application
    Filed: July 23, 2021
    Publication date: January 26, 2023
    Inventors: Chen Luo, Fu FW Wang, Shi Jie Zhang, Lei Gao, Sun Bing, Meng Ru Hou, Yu Heng Liu
  • Patent number: 11561719
    Abstract: A flash memory control method, a flash memory storage device and a flash memory controller are provided. The method includes the following. A flash memory module is instructed to perform a data merge operation to copy first data in a first physical unit into at least one second physical unit. After the first data is copied and before the first physical unit is erased, another programming operation is performed on the first physical unit to change a data storage state of at least a part of memory cells in the first physical unit from a first state into a second state. After the first physical unit is programmed, an erase operation is performed on the first physical unit.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: January 24, 2023
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Yu-Siang Yang, Wei Lin, An-Cheng Liu, Yu-Heng Liu, Chun-Hsi Lai, Ting-Chien Zhan
  • Publication number: 20220334723
    Abstract: A flash memory control method, a flash memory storage device and a flash memory controller are provided. The method includes the following. A flash memory module is instructed to perform a data merge operation to copy first data in a first physical unit into at least one second physical unit. After the first data is copied and before the first physical unit is erased, another programming operation is performed on the first physical unit to change a data storage state of at least a part of memory cells in the first physical unit from a first state into a second state. After the first physical unit is programmed, an erase operation is performed on the first physical unit.
    Type: Application
    Filed: April 27, 2021
    Publication date: October 20, 2022
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Yu-Siang Yang, Wei Lin, An-Cheng Liu, Yu-Heng Liu, Chun-Hsi Lai, Ting-Chien Zhan
  • Publication number: 20220293185
    Abstract: A memory control method, a memory storage device, and a memory control circuit unit are provided. The memory control method includes: programming multiple first memory cells in a first physical erasing unit in a rewritable non-volatile memory module; and applying an electronic pulse to at least one word line in the rewritable non-volatile memory module. The at least one word line is coupled to multiple second memory cells in the first physical erasing unit. The second memory cells include the first memory cells. The electronic pulse is not configured to read, program, or erase the second memory cells.
    Type: Application
    Filed: March 29, 2021
    Publication date: September 15, 2022
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Yu-Siang Yang, Wei Lin, An-Cheng Liu, Yu-Heng Liu, Chun-Hsi Lai, Ting-Chien Zhan
  • Patent number: 8647991
    Abstract: A method for forming a dual damascene opening includes the following steps. Firstly, a first hard mask layer with a trench pattern is formed over a material layer. Then, a dielectric layer is formed over the first hard mask layer and filled into an opening of the trench pattern. Then, a second hard mask layer with a via opening pattern is formed over the first hard mask layer and the dielectric layer. Then, a first etching process is performed, so that a via opening is at least formed in the dielectric layer. After the second hard mask layer is removed, a second etching process is performed. Consequently, a trench opening is formed in the material layer and the via opening is further extended into the material layer, wherein the via opening is located within the trench opening.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: February 11, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Yu-Heng Liu, Seng-Wah Liau
  • Publication number: 20140030885
    Abstract: A method for forming a dual damascene opening includes the following steps. Firstly, a first hard mask layer with a trench pattern is formed over a material layer. Then, a dielectric layer is formed over the first hard mask layer and filled into an opening of the trench pattern. Then, a second hard mask layer with a via opening pattern is formed over the first hard mask layer and the dielectric layer. Then, a first etching process is performed, so that a via opening is at least formed in the dielectric layer. After the second hard mask layer is removed, a second etching process is performed. Consequently, a trench opening is formed in the material layer and the via opening is further extended into the material layer, wherein the via opening is located within the trench opening.
    Type: Application
    Filed: July 30, 2012
    Publication date: January 30, 2014
    Inventors: Yu-Heng Liu, Seng-Wah Liau
  • Patent number: 8578477
    Abstract: The integrity of a computer may be checked by issuing a command to read data from a hardware component of the computer and retrieving the data from a data transfer buffer. The command may be sent to a secure driver that places the central processing unit (CPU) of the computer in system management mode to trigger execution of a system management interrupt (SMI) handler. The SMI handler may read the data from the hardware component, encrypt the data, and place the encrypted data in the data transfer buffer. A system integrity check application program may read the encrypted data to determine presence of malicious code based on the data. For example, the application program may infer presence of malicious code when the encrypted data does not conform to a particular encryption algorithm or when the data does not appear in the data transfer buffer.
    Type: Grant
    Filed: March 28, 2007
    Date of Patent: November 5, 2013
    Assignee: Trend Micro Incorporated
    Inventors: Yichin Lin, Peng-Yuan Yueh, Yu-Heng Liu
  • Patent number: 8328938
    Abstract: A buffer apparatus and a thin film deposition system are provided. The buffer apparatus is connected between a liquid material supply apparatus and a deposition machine. The buffer apparatus includes a container and a baffle. The container is used for containing a liquid material supplied from the liquid material supply apparatus. The top of the container has an input hole and an output hole. The baffle is disposed in the container and located under the input hole.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: December 11, 2012
    Assignee: United Microelectronics Corp.
    Inventors: Cheng-Chung Lim, Zhao-Jin Sun, Jui-Ling Tang, Chin-Khye Pang, Yu-Heng Liu
  • Publication number: 20100043701
    Abstract: A buffer apparatus and a thin film deposition system are provided. The buffer apparatus is connected between a liquid material supply apparatus and a deposition machine. The buffer apparatus includes a container and a baffle. The container is used for containing a liquid material supplied from the liquid material supply apparatus. The top of the container has an input hole and an output hole. The baffle is disposed in the container and located under the input hole.
    Type: Application
    Filed: August 21, 2008
    Publication date: February 25, 2010
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Chung Lim, Zhao-Jin Sun, Jui-Lin Tang, Chin-Khye Pang, Yu-Heng Liu
  • Publication number: 20080142965
    Abstract: A chip package includes: a circuit board formed with conductive traces; a semiconductor chip formed with conductive pads; a bridging member sandwiched between the circuit board and the semiconductor chip and including an elastic dielectric body and spaced apart flexible conductive lines, each of which extends through the elastic dielectric body to contact a respective one of the conductive traces of the circuit board and a respective one of the conductive pads of the semiconductor chip; and a holding member pressing the semiconductor chip against the elastic dielectric body so as to result in pressing action of the elastic dielectric body against the circuit board.
    Type: Application
    Filed: April 16, 2007
    Publication date: June 19, 2008
    Applicant: ADVANCED CONNECTION TECHNOLOGY INC.
    Inventors: Ching-Shun Wang, Chun-Hua Hsia, Yu-Heng Liu, Yang-Kai Wang, Kuang-Yau Teng, Ming-Chung Wang
  • Patent number: 7277242
    Abstract: A lens module includes a lens seat, an image sensor unit, a lens set, a circuit board, and a resilient interposer. The lens seat includes a top wall that is formed with a barrel hole, a side wall that extends from a periphery of the top wall and that cooperates with the top wall to define a chamber, and a lens barrel. The lens barrel has a first barrel portion disposed in the chamber and a second barrel portion extending from the first barrel portion and passing through the barrel hole in the top wall. The image sensor unit and the lens set are disposed in the first and second barrel portions of the lens barrel, respectively. The circuit board is disposed to cover an open side of the lens seat, and is connected electrically to the image sensor unit via the resilient interposer.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: October 2, 2007
    Assignee: Advanced Connection Technology Inc.
    Inventors: Ching-Shun Wang, Chun-Hua Hsia, Yu-Heng Liu, Yang-Kai Wang, Kuang-Yau Teng, Miy-Chung Wang
  • Publication number: 20040017136
    Abstract: A figured and patterned casing of a host computer is provided to increase the consumer's purchase options and further achieve the objective of promoting the industrial development and enhancing the merchandise sales volume; the present invention is mainly applied to a casing of a personal digital assistant (PDA), a desktop personal computer host unit, a notebook computer and a displayer for having an unique, attractive and extraordinary external style. In addition, through detachable casings with different figures and patterns, the consumer is capable of self-assembling the casing thereby increasing the variation and pleasure in application.
    Type: Application
    Filed: July 26, 2002
    Publication date: January 29, 2004
    Inventor: Yu-Heng Liu