Abstract: A liquid crystal polymer, composition, liquid crystal polymer film, laminated material and method of forming liquid crystal polymer film are provided. The liquid crystal polymer includes a first repeating unit, a second repeating unit, a third repeating unit, and a fourth repeating unit. The first repeating unit has a structure of Formula (I), the second repeating unit has a structure of Formula (II), the third repeating unit has a structure of Formula (III), and the fourth repeating unit has a structure of Formula (IV), a structure of Formula (V) or a structure of Formula (VI) wherein A1, A2, A3, Z1, R1, R2, R3 and Q are as defined in the specification.

Abstract: A semiconductor device includes a single diffusion break (SDB) structure dividing a fin-shaped structure into a first portion and a second portion, an isolation structure on the SDB structure, a first spacer adjacent to the isolation structure, a metal gate adjacent to the isolation structure, a shallow trench isolation (STI around the fin-shaped structure, and a second isolation structure on the STI. Preferably, a top surface of the first spacer is lower than a top surface of the isolation structure and a bottom surface of the first spacer is lower than a bottom surface of the metal gate.

Abstract: A method of manufacturing a light-emitting device, including: providing a substrate structure including a top surface; forming a precursor layer on the top surface; removing a portion of the precursor layer and a portion of the substrate from the top surface to form a base portion and a plurality of protrusions regularly arranged on the base portion; forming a buffer layer on the base portion and the plurality protrusions; and forming a III-V compound cap layer on the buffer layer; wherein one of the plurality of protrusions comprises a first portion and a second portion formed on the first portion; wherein the first portion is integrated with the base portion and has a first material which is the same as that of the base portion; and wherein the buffer layer contacts side surfaces of the plurality of protrusions and a surface of the base portion.

Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.

Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for switching a secondary cell to a primary cell. A user equipment (UE) monitors a first radio condition of the UE for beams of a primary cell and a second radio condition for beams of one or more secondary cells configured for the UE in carrier aggregation. The UE transmits a request to configure a candidate beam of at least one candidate secondary cell as a new primary cell in response to the first radio condition not satisfying a first threshold and the second radio condition for the at least one candidate secondary cell satisfying a second threshold. A base station determines to reconfigure at least one secondary cell as the new primary cell. The base station and the UE perform a handover of the UE to the new primary cell.

Abstract: An n-type metal oxide semiconductor transistor includes a gate structure, two source/drain regions, two amorphous portions and a silicide. The gate structure is disposed on a substrate. The two source/drain regions are disposed in the substrate and respectively located at two sides of the gate structure, wherein at least one of the source/drain regions is formed with a dislocation. The two amorphous portions are respectively disposed in the two source/drain regions. The silicide is disposed on the two source/drain regions, wherein at least one portion of the silicide overlaps the two amorphous portions.

Abstract: The present disclosure provides a semiconductor manufacturing method and a system therefore. The semiconductor manufacturing method includes: providing a gas from a container through an outlet to a semiconductor wafer manufacturing equipment, wherein a control valve is connected to the outlet to control a gas flow; retrieving a set of parameters corresponding to the gas flow; and determining a nominal position of the control valve by incorporating the set of parameters through a processor in order to provide a desired flow passage into the semiconductor wafer manufacturing equipment, wherein the semiconductor wafer manufacturing equipment includes a plurality of independent reaction chambers, wherein each reaction chamber is individually supplied with a gas pipe, and each gas pipe receives the gas from the container.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.

Abstract: The disclosure provides an electrical apparatus, including a substrate, a plurality of gate driver units and a plurality of gate lines. The gate driver units are disposed on the substrate. The gate lines are disposed on the substrate. Each of the gate lines is respectively electrically connected to the corresponding gate driver unit. Each of the gate lines is configured to transmit a respective gate signal. The gate lines include a first gate line and a second gate line. The first gate line and the second gate line are configured to transmit the respective gate signals at a same time.

Abstract: Disclosed is an electronic device including a tunable element, a first power supply circuit, and a second power supply circuit. The first power supply circuit and the second power supply circuit are electrically connected to the tunable element. The first power supply circuit drives the tunable element during a first time period. The second power supply circuit drives the tunable element during a second time period.

Abstract: A display panel includes a first substrate, a second substrate, a display layer, and a driving unit. The first substrate has a display area, an extended area, and an edge area located between the display area and the extended area. The display layer is positioned between the first and second substrates. The length of a boundary line of the edge area and the extended area is greater than the length of a bottom edge of the extended area that is away from the edge area.

Abstract: A method for performing cooperative counting and an associated apparatus are provided, where the method is applicable to a counter system, and the counter system includes a plurality of cameras. The method includes: setting a plurality of points on an electronic map as a plurality of predetermined points according to user inputs; determining at least one rule related to the predetermined points according to rule information, where the rule information is stored in the counter system; respectively performing video object detection upon a plurality of images captured by the cameras to generate detection results respectively corresponding to the cameras; and merging the detection results respectively corresponding to the cameras, to count events complying with the at least one rule.

Abstract: A method for performing cooperative counting and an associated apparatus are provided, where the method is applicable to a counter system, and the counter system includes a plurality of cameras. The method includes: setting a plurality of points on an electronic map as a plurality of predetermined points according to user inputs; determining at least one rule related to the predetermined points according to rule information, where the rule information is stored in the counter system; respectively performing video object detection upon a plurality of images captured by the cameras to generate detection results respectively corresponding to the cameras; and merging the detection results respectively corresponding to the cameras, to count events complying with the at least one rule.

Abstract: A display panel includes a first substrate, a second substrate, a display layer, and a driving unit. The first substrate has a display area, an extended area, and an edge area located between the display area and the extended area. The display layer is positioned between the first and second substrates. The length of a boundary line of the edge area and the extended area is greater than the length of a bottom edge of the extended area that is away from the edge area.

Abstract: A display panel includes a first substrate, a second substrate, a display layer, and a driving unit. The first substrate has a display area, an extended area, and an edge area located between the display area and the extended area. The display layer is positioned between the first and second substrates. The length of a boundary line of the edge area and the extended area is greater than the length of a bottom edge of the extended area that away from the edge area.

Abstract: The present invention provides a monitoring service system including a processing circuit arranged to control the monitoring service system. The processing circuit includes a system management module, a camera management module, and an identification-code analysis module. The system management module produces an identification code in response to an identification-code request received from a mobile device, and transmits the identification code to the mobile device. The identification-code analysis module identifies whether video streams captured by cameras include the identification code having information of the mobile device. The system management module provides a service to the mobile device according to information of a first camera that captures the identification code and the information of the mobile device.

Abstract: A display panel structure includes a substrate, plural gate lines and data lines arranged on the substrate, plural pixel units, and plural dummy pixel units. The substrate has a display region and a peripheral region surrounding the display region. The gate lines and data lines are extended from the display region to the peripheral region. The pixel units are disposed at the display region. The dummy pixel units are disposed at the peripheral region, and include a first region, a second region, and a third region. The dummy pixel units of the first region and the second region are arranged along a first direction and a second direction, respectively. The dummy pixel units of the third region are arranged between the first and second regions. The dummy pixel units of the third region include one of the gate lines and one of the data lines.

Abstract: A method for managing video recording storage space in a surveillance system and associated apparatus are provided, where the surveillance system includes at least one camera, and the method is applied to a control circuit of the surveillance system. The method includes the steps of: calculating scores of a plurality of subsets within a series of video recording data of the surveillance system, respectively, wherein the plurality of subsets corresponds to a plurality of time intervals, respectively, and the scores are utilized for determining whether to erase at least one portion of the plurality of subsets; and selecting at least one subset from the plurality of subsets according to the scores, and erasing the subset, wherein at least one score of the subset comprises an extreme value of the scores.

Abstract: A display panel includes a first substrate, a second substrate, a display layer, and a driving unit. The first substrate has a display area, an extended area, and an edge area located between the display area and the extended area. The display layer is positioned between the first and second substrates. The length of a boundary line of the edge area and the extended area is greater than the length of a bottom edge of the extended area that away from the edge area.