Patents by Inventor Yu-Hsiang Liao

Yu-Hsiang Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10795255
    Abstract: A method of forming a layout definition of a semiconductor device includes the following steps. Firstly, a plurality of first patterns is established to form a material layer over a substrate, with the first patterns being regularly arranged in a plurality of columns along a first direction to form an array arrangement. Next, a plurality of second patterns is established to surround the first patterns. Then, a third pattern is established to form a blocking layer on the material layer, with the third pattern being overlapped with a portion of the second patterns and with at least one of the second patterns being partially exposed from the third pattern. Finally, the first patterns are used to form a plurality of first openings in a stacked structure on the substrate to expose a portion of the substrate respectively.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: October 6, 2020
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Wei-Lun Hsu, Gang-Yi Lin, Yu-Hsiang Hung, Ying-Chih Lin, Feng-Yi Chang, Ming-Te Wei, Shih-Fang Tzou, Fu-Che Lee, Chia-Liang Liao
  • Patent number: 10797023
    Abstract: A method of fabricating an INFO package may include at least the following steps. A first buffer pattern and a second buffer pattern are formed on a substrate. A first chip is attached on the substrate through the first buffer pattern. A second chip is attached on the substrate through the second buffer pattern. A squeezing force is provided between an exterior surface of the substrate and a top surface of the first chip and between an exterior surface of the substrate and a top surface of the second chip. The squeezed first buffer pattern and the squeezed second buffer pattern are cured. A molding compound is formed surrounding the first chip, the second chip, the squeezed first buffer pattern and the squeezed second buffer pattern. A redistribution circuit structure layer is formed electrically connected to the first chip and the second chip on the molding compound.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: October 6, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Jui Kuo, Yu-Hsiang Hu, Sih-Hao Liao
  • Publication number: 20200286832
    Abstract: A semiconductor device includes a dielectric layer and a conductive structure in the dielectric layer. The dielectric layer includes a dielectric material and a compound represented by Chemical Formula 1.
    Type: Application
    Filed: May 25, 2020
    Publication date: September 10, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sih-Hao Liao, Hung-Jui Kuo, Yu-Hsiang Hu, Meng-Che Tu
  • Patent number: 10769948
    Abstract: A parking spot detection system is provided with a detection unit, a map database and a processing unit. The detection unit acquires position data and intensity data of a plurality of data points in an environment space. The map database provides map information. The processing unit is coupled to the detection unit and the map database and determines whether a geometric shape formed by adjacent data points is of a parking space according to the intensity data of the data points; and if the geometric shape is determined to be of the parking space, the processing unit further integrates the geometric shape and the position of the parking space into the map data according to the position data of the data points.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: September 8, 2020
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Hsiang Hao, Wen-Han Lu, Chia-Jui Hu, Tse-Lin Lee, Yu-Syuan Liao
  • Publication number: 20200279807
    Abstract: A semiconductor device including a semiconductor die, an encapsulant and a redistribution structure is provided. The encapsulant laterally encapsulates the semiconductor die. The redistribution structure is disposed on the semiconductor die and the encapsulant and is electrically connected to the semiconductor die. The redistribution structure includes a dielectric layer, a conductive via in the dielectric layer and a redistribution wiring covering the conductive via and a portion of the dielectric layer. The conductive via includes a pillar portion embedded in the dielectric layer and a protruding portion protruding from the pillar portion, wherein the protruding portion has a tapered sidewall.
    Type: Application
    Filed: May 17, 2020
    Publication date: September 3, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sih-Hao Liao, Hung-Jui Kuo, Yu-Hsiang Hu
  • Publication number: 20200279755
    Abstract: A method of manufacturing a semiconductor device includes placing a polymer raw material mixture over a substrate. The polymer raw material may include a polymer precursor, a photosensitizer, and an additive. The polymer raw material mixture is exposed to radiation to form a dielectric layer and cured at a temperature of between about 150° C. and about 230° C.
    Type: Application
    Filed: May 18, 2020
    Publication date: September 3, 2020
    Inventors: Sih-Hao Liao, Yu-Hsiang Hu, Hung-Jui Kuo, Chen-Hua Yu
  • Patent number: 10727117
    Abstract: A method for manufacturing a semiconductor structure includes following operations. A sacrificial layer is formed over the conductive layer, wherein the sacrificial layer includes a first sacrificial portion over the first conductive portion, and a second sacrificial portion over the second conductive portion, and a first thickness of the first sacrificial portion is larger than a second thickness of the second sacrificial portion. The first sacrificial portion and the second sacrificial portion of the sacrificial layer, and the second conductive portion of the conductive layer are removed, with at least a portion of the first conductive portion remaining over the bottom of the trench.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: July 28, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Hsiang Liao, Ya-Huei Li, Li-Wei Chu, Chun-Wen Nieh, Hung-Yi Huang, Chih-Wei Chang, Ching-Hwanq Su
  • Publication number: 20200211389
    Abstract: A parking spot detection system is provided with a detection unit, a map database and a processing unit. The detection unit acquires position data and intensity data of a plurality of data points in an environment space. The map database provides map information. The processing unit is coupled to the detection unit and the map database and determines whether a geometric shape formed by adjacent data points is of a parking space according to the intensity data of the data points; and if the geometric shape is determined to be of the parking space, the processing unit further integrates the geometric shape and the position of the parking space into the map data according to the position data of the data points.
    Type: Application
    Filed: December 27, 2018
    Publication date: July 2, 2020
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Hsiang Hao, Wen-Han Lu, Chia-Jui Hu, Tse-Lin Lee, Yu-Syuan Liao
  • Publication number: 20200209391
    Abstract: An automatic vehicular sensor adjustment method includes: a step of installing a vehicular sensor with a posture on a vehicle body, the posture being defined by at least one of a distance, an inclination and a facing angle of the vehicular sensor with respect to the vehicle body, the distance including a height and a position of the vehicular sensor with respect to the vehicle body; a step of, according to an environmental scenario in which the vehicle body encounters, determining whether or not there is an adjustment need, the environmental scenario including a single event or multiple events; and, a step of, according to the adjustment need, adjusting the posture of the vehicular sensor. In addition, an automatic vehicular sensor adjustment system is also provided.
    Type: Application
    Filed: December 26, 2018
    Publication date: July 2, 2020
    Inventors: CHIA-JUI HU, WEN-HAN LU, TSE-LIN LEE, YU-HSIANG HAO, YU-SYUAN LIAO
  • Patent number: 10665545
    Abstract: Semiconductor devices, semiconductor packages and methods of forming the same are provided. One of the semiconductor device includes a dielectric layer and a connector. The dielectric layer includes a dielectric material and an additive, wherein the additive includes a compound represented by Chemical Formula 1. The connector is disposed in the dielectric layer.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: May 26, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sih-Hao Liao, Hung-Jui Kuo, Yu-Hsiang Hu, Meng-Che Tu
  • Patent number: 10658199
    Abstract: A method of manufacturing a semiconductor device includes placing a polymer raw material mixture over a substrate. The polymer raw material may include a polymer precursor, a photosensitizer, and an additive. The polymer raw material mixture is exposed to radiation to form a dielectric layer and cured at a temperature of between about 150° C. and about 230° C.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: May 19, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sih-Hao Liao, Yu-Hsiang Hu, Hung-Jui Kuo, Chen-Hua Yu
  • Patent number: 10658208
    Abstract: A polyimide composition for a package structure is provided. The polyimide composition includes a polyimide precursor, a cross-linker, a photosensitizer, a first additive, a second additive and a solvent. The first additive comprises a polyether based compound, and the second additive comprises a siloxane based compound. The polyimide composition has more than 98% cyclization of the polyimide precursor when the polyimide composition is cured at a temperature range of 160° C. to 200° C.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: May 19, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sih-Hao Liao, Hung-Jui Kuo, Yu-Hsiang Hu
  • Patent number: 10658287
    Abstract: A semiconductor device including a semiconductor die, an encapsulant and a redistribution structure is provided. The encapsulant laterally encapsulates the semiconductor die. The redistribution structure is disposed on the semiconductor die and the encapsulant and is electrically connected to the semiconductor die. The redistribution structure includes a dielectric layer, a conductive via in the dielectric layer and a redistribution wiring covering the conductive via and a portion of the dielectric layer. The conductive via includes a pillar portion embedded in the dielectric layer and a protruding portion protruding from the pillar portion, wherein the protruding portion has a tapered sidewall.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: May 19, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sih-Hao Liao, Hung-Jui Kuo, Yu-Hsiang Hu
  • Publication number: 20200135567
    Abstract: A method of forming a semiconductor device includes forming a first dielectric layer over a front side of a wafer, the wafer having a plurality of dies at the front side of the wafer, the first dielectric layer having a first shrinkage ratio smaller than a first pre-determined threshold; curing the first dielectric layer at a first temperature, where after curing the first dielectric layer, a first distance between a highest point of an upper surface of the first dielectric layer and a lowest point of the upper surface of the first dielectric layer is smaller than a second pre-determined threshold; thinning the wafer from a backside of the wafer; and performing a dicing process to separate the plurality of dies into individual dies.
    Type: Application
    Filed: April 30, 2019
    Publication date: April 30, 2020
    Inventors: Meng-Che Tu, Wei-Chih Chen, Sih-Hao Liao, Yu-Hsiang Hu, Hung-Jui Kuo, Chen-Hua Yu
  • Publication number: 20200125869
    Abstract: A nighttime vehicle detecting method is for capturing an image by a camera and driving a computing unit to compute the image and then detect a highlight point of the image. The nighttime vehicle detecting method is for driving the computing unit to perform a communicating region labeling algorithm to label a plurality of highlight pixels connected to each other as a communicating region value, and then performing an area filtering algorithm to analyze an area of the highlight pixels connected to each other and judge whether the highlight pixels connected to each other are a vehicle lamp or not according to a size of the area. The nighttime vehicle detecting method is for driving the computing unit to perform an optical flow algorithm to obtain a speed of the vehicle lamp, and then filtering the vehicle lamp moved at the speed smaller than a predetermined speed.
    Type: Application
    Filed: November 23, 2018
    Publication date: April 23, 2020
    Inventors: Po-Hsiang LIAO, Hung-Pang LIN, Yu-Lung CHANG, Li-You HSU
  • Publication number: 20200118960
    Abstract: A package structure including at least one semiconductor die, an insulating encapsulant, an insulating layer, conductive pillars, a dummy pillar, a first seed layer and a redistribution layer is provided. The semiconductor die has a first surface and a second surface opposite to the first surface. The insulating encapsulant is encapsulating the semiconductor die. The insulating layer is disposed on the first surface of the semiconductor die and on the insulating encapsulant. The conductive pillars are located on the semiconductor die. The dummy pillar is located on the insulating encapsulant. The first seed layer is embedded in the insulating layer, wherein the first seed layer is located in between the conductive pillars and the semiconductor die, and located in between the dummy pillar and the insulating encapsulant. The redistribution layer is disposed over the insulating layer and is electrically connected to the semiconductor die through the conductive pillars.
    Type: Application
    Filed: December 16, 2019
    Publication date: April 16, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Chih Chen, Hung-Jui Kuo, Yu-Hsiang Hu, Sih-Hao Liao, Po-Han Wang
  • Publication number: 20200118958
    Abstract: A package structure and a method of forming the same are provided. The package structure includes a die, an encapsulant, a polymer layer and a redistribution layer. The encapsulant laterally encapsulates the die. The polymer layer is on the encapsulant and the die. The polymer layer includes an extending portion having a bottom surface lower than a top surface of the die. The redistribution layer penetrates through the polymer layer to connect to the die.
    Type: Application
    Filed: December 16, 2019
    Publication date: April 16, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Chih Chen, Hung-Jui Kuo, Yu-Hsiang Hu, Sih-Hao Liao
  • Publication number: 20200111739
    Abstract: A method for forming a semiconductor contact structure is provided. The method includes depositing a dielectric layer over a substrate. The method also includes etching the dielectric layer to expose a sidewall of the dielectric layer and a top surface of the substrate. In addition, the method includes forming a silicide region in the substrate. The method also includes applying a plasma treatment to the sidewall of the dielectric layer and the top surface of the substrate to form a nitridation region adjacent to a periphery of the silicide region. The method further includes depositing an adhesion layer on the dielectric layer and the silicide region.
    Type: Application
    Filed: December 9, 2019
    Publication date: April 9, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Wen CHENG, Wei-Yip LOH, Yu-Hsiang LIAO, Sheng-Hsuan LIN, Hong-Mao LEE, Chun-I TSAI, Ken-Yu CHANG, Wei-Jung LIN, Chih-Wei CHANG, Ming-Hsing TSAI
  • Publication number: 20200105764
    Abstract: A method of forming a layout definition of a semiconductor device includes the following steps. Firstly, a plurality of first patterns is established to form a material layer over a substrate, with the first patterns being regularly arranged in a plurality of columns along a first direction to form an array arrangement. Next, a plurality of second patterns is established to surround the first patterns. Then, a third pattern is established to form a blocking layer on the material layer, with the third pattern being overlapped with a portion of the second patterns and with at least one of the second patterns being partially exposed from the third pattern. Finally, the first patterns are used to form a plurality of first openings in a stacked structure on the substrate to expose a portion of the substrate respectively.
    Type: Application
    Filed: October 31, 2018
    Publication date: April 2, 2020
    Inventors: Wei-Lun Hsu, Gang-Yi Lin, Yu-Hsiang Hung, Ying-Chih Lin, Feng-Yi Chang, Ming-Te Wei, Shih-Fang Tzou, Fu-Che Lee, Chia-Liang Liao
  • Publication number: 20200091073
    Abstract: Semiconductor devices, semiconductor packages and methods of forming the same are provided. One of the semiconductor device includes a dielectric layer and a connector. The dielectric layer includes a dielectric material and an additive, wherein the additive includes a compound represented by Chemical Formula 1. The connector is disposed in the dielectric layer.
    Type: Application
    Filed: September 19, 2018
    Publication date: March 19, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sih-Hao Liao, Hung-Jui Kuo, Yu-Hsiang Hu, Meng-Che Tu