Abstract: A compressing apparatus has a compressing jig and a pressing device. The compressing jig has a lower compressing assembly and an upper compressing assembly. The lower compressing assembly has a lower mount with at least one pitching plate and at least one limiting set. Each one of the at least one limiting set has multiple poles disposed around a corresponding pitching plate. Each one of the multiple poles has a top end higher than the corresponding pitching plate and a limiting indention disposed at the top end with a supporting portion disposed at a same height with the corresponding pitching plate. The upper compressing assembly has at least one clamping plate respectively aligned with the at least one pitching plate and being movable up and down. The pressing device has a base with a receiving space to receive the upper compressing assembly.

Abstract: A compressing apparatus has a compressing jig and a pressing device. The compressing jig has a lower compressing assembly and an upper compressing assembly. The lower compressing assembly has a lower mount with at least one pitching plate and at least one limiting set. Each one of the at least one limiting set has multiple poles disposed around a corresponding pitching plate. Each one of the multiple poles has a top end higher than the corresponding pitching plate and a limiting indention disposed at the top end with a supporting portion disposed at a same height with the corresponding pitching plate. The upper compressing assembly has at least one clamping plate respectively aligned with the at least one pitching plate and being movable up and down. The pressing device has a base with a receiving space to receive the upper compressing assembly.

Abstract: A flash storage comprises a flash memory, including a plurality of physical memory blocks, each of physical memory blocks comprising a plurality of memory segments, and a plurality of physical sectors, and each of physical sectors being further provided therein with at least a user data column and a logical address pointer column. When physical data is written into the user data column, writing logical address pointer data into the logical address pointer column of the same physical sector may be performed together by the control of a micro-controller. Furthermore, the logical address pointer data in the same memory segment are arranged to be a backup memory segment address mapping table and then stored in one physical memory block. The backup memory segment address mapping table may be loaded directly and stored into a registered memory by the micro-controller when the system boots.

Abstract: A backlight module is applied to a liquid crystal display device. The liquid crystal display device includes an optical film set having at least one optical film. The optical film set is disposed above the backlight module. The backlight module includes a housing and a spacer. The housing has a bottom plate provided with a through opening, an inward side and an outward side, wherein the inward side faces the optical film and the outward side is opposite to the inward side. The spacer supports the optical film set and is mounted onto the bottom plate of the backlight module from the outward side of the bottom plate.

Abstract: A flash storage comprises a flash memory, including a plurality of physical memory blocks, each of physical memory blocks comprising a plurality of memory segments, and a plurality of physical sectors, and each of physical sectors being further provided therein with at least a user data column and a logical address pointer column. When physical data is written into the user data column, writing logical address pointer data into the logical address pointer column of the same physical sector may be performed together by the control of a micro-controller. Furthermore, the logical address pointer data in the same memory segment are arranged to be a backup memory segment address mapping table and then stored in one physical memory block. The backup memory segment address mapping table may be loaded directly and stored into a registered memory by the micro-controller when the system boots.

Abstract: An execution method and architecture of multiple-program-banks firmware are proposed. The firmware is divided into multiple program banks stored in a nonvolatile memory. The program banks are also stored in a RAM. A No1 Bank manages the execution of these program banks. Programs of the program banks and updated codes of common programs can be modified at any time via an external interface bus. The execution method and architecture of multiple-program-banks firmware can accomplish better performance of program execution, and can change the content of a firmware program to enhance the flexibility of firmware.

Abstract: A data storage device having multiple buffers is proposed. When storing data, a controller makes use of a host's bus to select and transmit multiple block data to multiple buffers for temporary storage and then records relevant details. Next, the controller transmits the data from the buffers to a storage connected with the controller. When retrieving data, the controller selects the data from the storage and temporarily stores the data in the buffers and then records relevant details. Subsequently, the controller transmits the data to the host. The controller is used to control the operations of the host, the buffers, and the storage. Multiple buffers are exploited to achieve the maximum bandwidth of the transmission interface of the host to increase the transmission speed.