Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.

Abstract: A switching control circuit for use in controlling a resonant flyback power converter generates a first driving signal and a second driving signal. The first driving signal is configured to turn on the first transistor to generate a first current to magnetize a transformer and charge a resonant capacitor. The transformer and charge a resonant capacitor are connected in series. The second driving signal is configured to turn on the second transistor to generate a second current to discharge the resonant capacitor. During a power-on period of the resonant flyback power converter, the second driving signal includes a plurality of short-pulses configured to turn on the second transistor for discharging the resonant capacitor. A pulse-width of the short-pulses of the second driving signal is short to an extent that the second current does not exceed a current limit threshold.

Abstract: Provided are structures and methods for forming structures with sloping surfaces of a desired profile. An exemplary method includes performing a first etch process to differentially etch a gate material to a recessed surface, wherein the recessed surface includes a first horn at a first edge, a second horn at a second edge, and a valley located between the first horn and the second horn; depositing an etch-retarding layer over the recessed surface, wherein the etch-retarding layer has a central region over the valley and has edge regions over the horns, and wherein the central region of the etch-retarding layer is thicker than the edge regions of the etch-retarding layer; and performing a second etch process to recess the horns to establish the gate material with a desired profile.

Abstract: A method for fabricating semiconductor devices is disclosed. The method includes forming a gate trench over a semiconductor channel, the gate trench being surrounded by gate spacers. The method includes sequentially depositing a work function metal, a glue metal, and an electrode metal in the gate trench. The method includes etching respective portions of the electrode metal and the glue metal to form a gate electrode above a metal gate structure. The metal gate structure includes a remaining portion of the work function metal and the gate electrode includes a remaining portion of the electrode metal. The gate electrode has an upper surface extending away from a top surface of the metal gate structure.

Abstract: A method includes fabricating a semiconductor device, wherein the method includes depositing a coating layer on a first region and a second region under a loading condition such that a height of the coating layer in the first region is greater than a height of the coating layer in the second region. The method also includes applying processing gas to the coating layer to remove an upper portion of the coating layer such that a height of the coating layer in the first region is a same as a height of the coating layer in the second region.

Abstract: Disclosed is a semiconductor fabrication method. The method includes forming a gate stack in an area previously occupied by a dummy gate structure; forming a first metal cap layer over the gate stack; forming a first dielectric cap layer over the first metal cap layer; selectively removing a portion of the gate stack and the first metal cap layer while leaving a sidewall portion of the first metal cap layer that extends along a sidewall of the first dielectric cap layer; forming a second metal cap layer over the gate stack and the first metal cap layer wherein a sidewall portion of the second metal cap layer extends further along a sidewall of the first dielectric cap layer; forming a second dielectric cap layer over the second metal cap layer; and flattening a top layer of the first dielectric cap layer and the second dielectric cap layer using planarization operations.

Abstract: A method for managing threads and an electronic device using the method are provided. In the method, a current time is obtained. A time interval from now to a time for the processor to wake up next time is calculated. The processor is released until reaching the end of the time interval. When the end of the time interval is reached or a first notice signal of the processor is received, a first newest time is obtained to update a current time, and the current time is logged as a basis time. It is respectively checked whether the current time satisfies a plurality of predetermined time conditions of the registered threads against a plurality of registered threads in the threads. When the current time satisfies the predetermined time condition of a first registered thread among the registered threads, the first registered thread is waked up.

Abstract: An embodiment of the invention provides an orientation detection method for a portable device. The method comprises acquiring an accelerometer data, determining whether the portable device is in a flat status, determining whether the portable device is in a stable status, and when the portable device is determined in both the flat status and the stable status, stopping acquiring the accelerometer data until receiving an enable signal.

Abstract: A method for managing threads and an electronic device using the method are provided. In the method, a current time is obtained. A time interval from now to a time for the processor to wake up next time is calculated. The processor is released until reaching the end of the time interval. When the end of the time interval is reached or a first notice signal of the processor is received, a first newest time is obtained to update a current time, and the current time is logged as a basis time. It is respectively checked whether the current time satisfies a plurality of predetermined time conditions of the registered threads against a plurality of registered threads in the threads. When the current time satisfies the predetermined time condition of a first registered thread among the registered threads, the first registered thread is waked up.

Abstract: A scaling-up control method and a scaling-up control apparatus are used in a display device. The display device includes a scaler for converting an original image signal into an output image signal by performing a linear interpolation. Moreover, by utilizing a global locking mechanism and a local locking mechanism to perform the linear interpolation to determine the actual position of the interpolated pixel, the position error of the pixel position is largely reduced. Since the difference between the calculated pixel value and the ideal pixel value is reduced, the imaging quality of the output image signal is enhanced.

Abstract: An embodiment of the invention provides an orientation detection method for a portable device. The method comprises acquiring an accelerometer data, determining whether the portable device is in a flat status, determining whether the portable device is in a stable status, and when the portable device is determined in both the flat status and the stable status, stopping acquiring the accelerometer data until receiving an enable signal.

Abstract: A method for processing display data includes: storing an image data in a plurality of first-type memories by taking scanning line data as a unit; providing one of the scanning line data stored in a particular memory of the first-type memories to one of a plurality of second-type memories, the particular memory being one of the first-type memories, which are not receiving and storing the image data; and outputting the scanning line data stored in the second-type memories. Time periods for outputting the scanning line data of the image data from the second-type memories are not overlapped.

Abstract: A scaling-up control method and a scaling-up control apparatus are used in a display device. The display device includes a scaler for converting an original image signal into an output image signal by performing a linear interpolation. Moreover, by utilizing a global locking mechanism and a local locking mechanism to perform the linear interpolation to determine the actual position of the interpolated pixel, the position error of the pixel position is largely reduced. Since the difference between the calculated pixel value and the ideal pixel value is reduced, the imaging quality of the output image signal is enhanced.

Abstract: A method for processing display data includes: storing an image data in a plurality of first-type memories by taking scanning line data as a unit; providing one of the scanning line data stored in a particular memory of the first-type memories to one of a plurality of second-type memories, the particular memory being one of the first-type memories, which are not receiving and storing the image data; and outputting the scanning line data stored in the second-type memories. Time periods for outputting the scanning line data of the image data from the second-type memories are not overlapped.